336 	rt2x00mmio_register_write(rt2x00dev, INT_MASK_CSR, reg);  in rt2800mmio_enable_interrupt()
382 			rt2x00mmio_register_write(rt2x00dev, BCN_TIME_CFG, reg);  in rt2800mmio_tbtt_tasklet()
387 			rt2x00mmio_register_write(rt2x00dev, BCN_TIME_CFG, reg);  in rt2800mmio_tbtt_tasklet()
464 	rt2x00mmio_register_write(rt2x00dev, INT_SOURCE_CSR, reg);  in rt2800mmio_interrupt()
506 	rt2x00mmio_register_write(rt2x00dev, INT_MASK_CSR, reg);  in rt2800mmio_interrupt()
525 		rt2x00mmio_register_write(rt2x00dev, INT_SOURCE_CSR, reg);  in rt2800mmio_toggle_irq()
537 	rt2x00mmio_register_write(rt2x00dev, INT_MASK_CSR, reg);  in rt2800mmio_toggle_irq()
565 		rt2x00mmio_register_write(rt2x00dev, MAC_SYS_CTRL, reg);  in rt2800mmio_start_queue()
572 		rt2x00mmio_register_write(rt2x00dev, BCN_TIME_CFG, reg);  in rt2800mmio_start_queue()
576 		rt2x00mmio_register_write(rt2x00dev, INT_TIMER_EN, reg);  in rt2800mmio_start_queue()
595 		rt2x00mmio_register_write(rt2x00dev, TX_CTX_IDX(queue->qid),  in rt2800mmio_kick_queue()
600 		rt2x00mmio_register_write(rt2x00dev, TX_CTX_IDX(5),  in rt2800mmio_kick_queue()
618 		rt2x00mmio_register_write(rt2x00dev, MAC_SYS_CTRL, reg);  in rt2800mmio_stop_queue()
625 		rt2x00mmio_register_write(rt2x00dev, BCN_TIME_CFG, reg);  in rt2800mmio_stop_queue()
629 		rt2x00mmio_register_write(rt2x00dev, INT_TIMER_EN, reg);  in rt2800mmio_stop_queue()
730 		rt2x00mmio_register_write(rt2x00dev, RX_CRX_IDX,  in rt2800mmio_clear_entry()
748 	rt2x00mmio_register_write(rt2x00dev, TX_BASE_PTR0,  in rt2800mmio_init_queues()
750 	rt2x00mmio_register_write(rt2x00dev, TX_MAX_CNT0,  in rt2800mmio_init_queues()
752 	rt2x00mmio_register_write(rt2x00dev, TX_CTX_IDX0, 0);  in rt2800mmio_init_queues()
753 	rt2x00mmio_register_write(rt2x00dev, TX_DTX_IDX0, 0);  in rt2800mmio_init_queues()
756 	rt2x00mmio_register_write(rt2x00dev, TX_BASE_PTR1,  in rt2800mmio_init_queues()
758 	rt2x00mmio_register_write(rt2x00dev, TX_MAX_CNT1,  in rt2800mmio_init_queues()
760 	rt2x00mmio_register_write(rt2x00dev, TX_CTX_IDX1, 0);  in rt2800mmio_init_queues()
761 	rt2x00mmio_register_write(rt2x00dev, TX_DTX_IDX1, 0);  in rt2800mmio_init_queues()
764 	rt2x00mmio_register_write(rt2x00dev, TX_BASE_PTR2,  in rt2800mmio_init_queues()
766 	rt2x00mmio_register_write(rt2x00dev, TX_MAX_CNT2,  in rt2800mmio_init_queues()
768 	rt2x00mmio_register_write(rt2x00dev, TX_CTX_IDX2, 0);  in rt2800mmio_init_queues()
769 	rt2x00mmio_register_write(rt2x00dev, TX_DTX_IDX2, 0);  in rt2800mmio_init_queues()
772 	rt2x00mmio_register_write(rt2x00dev, TX_BASE_PTR3,  in rt2800mmio_init_queues()
774 	rt2x00mmio_register_write(rt2x00dev, TX_MAX_CNT3,  in rt2800mmio_init_queues()
776 	rt2x00mmio_register_write(rt2x00dev, TX_CTX_IDX3, 0);  in rt2800mmio_init_queues()
777 	rt2x00mmio_register_write(rt2x00dev, TX_DTX_IDX3, 0);  in rt2800mmio_init_queues()
779 	rt2x00mmio_register_write(rt2x00dev, TX_BASE_PTR4, 0);  in rt2800mmio_init_queues()
780 	rt2x00mmio_register_write(rt2x00dev, TX_MAX_CNT4, 0);  in rt2800mmio_init_queues()
781 	rt2x00mmio_register_write(rt2x00dev, TX_CTX_IDX4, 0);  in rt2800mmio_init_queues()
782 	rt2x00mmio_register_write(rt2x00dev, TX_DTX_IDX4, 0);  in rt2800mmio_init_queues()
784 	rt2x00mmio_register_write(rt2x00dev, TX_BASE_PTR5, 0);  in rt2800mmio_init_queues()
785 	rt2x00mmio_register_write(rt2x00dev, TX_MAX_CNT5, 0);  in rt2800mmio_init_queues()
786 	rt2x00mmio_register_write(rt2x00dev, TX_CTX_IDX5, 0);  in rt2800mmio_init_queues()
787 	rt2x00mmio_register_write(rt2x00dev, TX_DTX_IDX5, 0);  in rt2800mmio_init_queues()
790 	rt2x00mmio_register_write(rt2x00dev, RX_BASE_PTR,  in rt2800mmio_init_queues()
792 	rt2x00mmio_register_write(rt2x00dev, RX_MAX_CNT,  in rt2800mmio_init_queues()
794 	rt2x00mmio_register_write(rt2x00dev, RX_CRX_IDX,  in rt2800mmio_init_queues()
796 	rt2x00mmio_register_write(rt2x00dev, RX_DRX_IDX, 0);  in rt2800mmio_init_queues()
800 	rt2x00mmio_register_write(rt2x00dev, DELAY_INT_CFG, 0);  in rt2800mmio_init_queues()
821 	rt2x00mmio_register_write(rt2x00dev, WPDMA_RST_IDX, reg);  in rt2800mmio_init_registers()
823 	rt2x00mmio_register_write(rt2x00dev, PBF_SYS_CTRL, 0x00000e1f);  in rt2800mmio_init_registers()
824 	rt2x00mmio_register_write(rt2x00dev, PBF_SYS_CTRL, 0x00000e00);  in rt2800mmio_init_registers()
837 		rt2x00mmio_register_write(rt2x00dev, AUX_CTRL, reg);  in rt2800mmio_init_registers()
840 	rt2x00mmio_register_write(rt2x00dev, PWR_PIN_CFG, 0x00000003);  in rt2800mmio_init_registers()
845 	rt2x00mmio_register_write(rt2x00dev, MAC_SYS_CTRL, reg);  in rt2800mmio_init_registers()
847 	rt2x00mmio_register_write(rt2x00dev, MAC_SYS_CTRL, 0x00000000);  in rt2800mmio_init_registers()