Lines Matching refs:xlat_reg
637 u.v64 = ioread64(mmio + bar2_off(ndev->xlat_reg->bar2_xlat, 2)); in ndev_debugfs_read()
642 u.v32 = ioread32(mmio + bar2_off(ndev->xlat_reg->bar2_xlat, 4)); in ndev_debugfs_read()
646 u.v32 = ioread32(mmio + bar2_off(ndev->xlat_reg->bar2_xlat, 5)); in ndev_debugfs_read()
650 u.v64 = ioread64(mmio + bar2_off(ndev->xlat_reg->bar2_xlat, 4)); in ndev_debugfs_read()
655 u.v64 = ioread64(mmio + bar2_off(ndev->xlat_reg->bar2_limit, 2)); in ndev_debugfs_read()
660 u.v32 = ioread32(mmio + bar2_off(ndev->xlat_reg->bar2_limit, 4)); in ndev_debugfs_read()
663 u.v32 = ioread32(mmio + bar2_off(ndev->xlat_reg->bar2_limit, 5)); in ndev_debugfs_read()
667 u.v64 = ioread64(mmio + bar2_off(ndev->xlat_reg->bar2_limit, 4)); in ndev_debugfs_read()
844 unsigned long base_reg, xlat_reg, limit_reg; in intel_ntb_mw_set_trans() local
873 base_reg = bar0_off(ndev->xlat_reg->bar0_base, bar); in intel_ntb_mw_set_trans()
874 xlat_reg = bar2_off(ndev->xlat_reg->bar2_xlat, bar); in intel_ntb_mw_set_trans()
875 limit_reg = bar2_off(ndev->xlat_reg->bar2_limit, bar); in intel_ntb_mw_set_trans()
887 iowrite64(addr, mmio + xlat_reg); in intel_ntb_mw_set_trans()
888 reg_val = ioread64(mmio + xlat_reg); in intel_ntb_mw_set_trans()
890 iowrite64(0, mmio + xlat_reg); in intel_ntb_mw_set_trans()
899 iowrite64(0, mmio + xlat_reg); in intel_ntb_mw_set_trans()
918 iowrite32(addr, mmio + xlat_reg); in intel_ntb_mw_set_trans()
919 reg_val = ioread32(mmio + xlat_reg); in intel_ntb_mw_set_trans()
921 iowrite32(0, mmio + xlat_reg); in intel_ntb_mw_set_trans()
930 iowrite32(0, mmio + xlat_reg); in intel_ntb_mw_set_trans()
1340 ndev->xlat_reg = &atom_sec_xlat; in atom_init_ntb()
1756 ndev->xlat_reg = &xeon_sec_xlat; in xeon_init_ntb()
1768 ndev->xlat_reg = &xeon_pri_xlat; in xeon_init_ntb()
1775 ndev->xlat_reg = &xeon_sec_xlat; in xeon_init_ntb()