Lines Matching refs:padcfg0
69 u32 padcfg0; member
341 void __iomem *padcfg0; in intel_pinmux_set_mux() local
344 padcfg0 = intel_get_padcfg(pctrl, grp->pins[i], PADCFG0); in intel_pinmux_set_mux()
345 value = readl(padcfg0); in intel_pinmux_set_mux()
350 writel(value, padcfg0); in intel_pinmux_set_mux()
363 void __iomem *padcfg0; in intel_gpio_request_enable() local
374 padcfg0 = intel_get_padcfg(pctrl, pin, PADCFG0); in intel_gpio_request_enable()
376 value = readl(padcfg0) & ~PADCFG0_PMODE_MASK; in intel_gpio_request_enable()
383 writel(value, padcfg0); in intel_gpio_request_enable()
395 void __iomem *padcfg0; in intel_gpio_set_direction() local
401 padcfg0 = intel_get_padcfg(pctrl, pin, PADCFG0); in intel_gpio_set_direction()
403 value = readl(padcfg0); in intel_gpio_set_direction()
408 writel(value, padcfg0); in intel_gpio_set_direction()
617 u32 padcfg0; in intel_gpio_set() local
620 padcfg0 = readl(reg); in intel_gpio_set()
622 padcfg0 |= PADCFG0_GPIOTXSTATE; in intel_gpio_set()
624 padcfg0 &= ~PADCFG0_GPIOTXSTATE; in intel_gpio_set()
625 writel(padcfg0, reg); in intel_gpio_set()
1069 pads[i].padcfg0 = val & ~PADCFG0_GPIORXSTATE; in intel_pinctrl_suspend()
1131 if (val != pads[i].padcfg0) { in intel_pinctrl_resume()
1132 writel(pads[i].padcfg0, padcfg); in intel_pinctrl_resume()