Lines Matching refs:SIRFSOC_GPIO_CTRL
339 SIRFSOC_GPIO_CTRL(i, j)); in sirfsoc_pinmux_suspend_noirq()
362 SIRFSOC_GPIO_CTRL(i, j)); in sirfsoc_pinmux_resume_noirq()
427 offset = SIRFSOC_GPIO_CTRL(bank->id, idx); in sirfsoc_gpio_irq_ack()
445 offset = SIRFSOC_GPIO_CTRL(bank->id, idx); in __sirfsoc_gpio_irq_mask()
475 offset = SIRFSOC_GPIO_CTRL(bank->id, idx); in sirfsoc_gpio_irq_unmask()
496 offset = SIRFSOC_GPIO_CTRL(bank->id, idx); in sirfsoc_gpio_irq_type()
578 ctrl = readl(sgpio->chip.regs + SIRFSOC_GPIO_CTRL(bank->id, idx)); in sirfsoc_gpio_handle_irq()
623 sirfsoc_gpio_set_input(sgpio, SIRFSOC_GPIO_CTRL(bank->id, offset)); in sirfsoc_gpio_request()
640 sirfsoc_gpio_set_input(sgpio, SIRFSOC_GPIO_CTRL(bank->id, offset)); in sirfsoc_gpio_free()
655 offset = SIRFSOC_GPIO_CTRL(bank->id, idx); in sirfsoc_gpio_direction_input()
698 offset = SIRFSOC_GPIO_CTRL(bank->id, idx); in sirfsoc_gpio_direction_output()
718 val = readl(sgpio->chip.regs + SIRFSOC_GPIO_CTRL(bank->id, offset)); in sirfsoc_gpio_get_value()
735 ctrl = readl(sgpio->chip.regs + SIRFSOC_GPIO_CTRL(bank->id, offset)); in sirfsoc_gpio_set_value()
740 writel(ctrl, sgpio->chip.regs + SIRFSOC_GPIO_CTRL(bank->id, offset)); in sirfsoc_gpio_set_value()
753 u32 offset = SIRFSOC_GPIO_CTRL(i, n); in sirfsoc_gpio_set_pullup()
770 u32 offset = SIRFSOC_GPIO_CTRL(i, n); in sirfsoc_gpio_set_pulldown()