Lines Matching refs:sun4i_pwm

102 	struct sun4i_pwm_chip *sun4i_pwm = to_sun4i_pwm_chip(chip);  in sun4i_pwm_config()  local
108 clk_rate = clk_get_rate(sun4i_pwm->clk); in sun4i_pwm_config()
110 if (sun4i_pwm->data->has_prescaler_bypass) { in sun4i_pwm_config()
148 err = clk_prepare_enable(sun4i_pwm->clk); in sun4i_pwm_config()
154 spin_lock(&sun4i_pwm->ctrl_lock); in sun4i_pwm_config()
155 val = sun4i_pwm_readl(sun4i_pwm, PWM_CTRL_REG); in sun4i_pwm_config()
157 if (sun4i_pwm->data->has_rdy && (val & PWM_RDY(pwm->hwpwm))) { in sun4i_pwm_config()
158 spin_unlock(&sun4i_pwm->ctrl_lock); in sun4i_pwm_config()
159 clk_disable_unprepare(sun4i_pwm->clk); in sun4i_pwm_config()
166 sun4i_pwm_writel(sun4i_pwm, val, PWM_CTRL_REG); in sun4i_pwm_config()
169 val = sun4i_pwm_readl(sun4i_pwm, PWM_CTRL_REG); in sun4i_pwm_config()
172 sun4i_pwm_writel(sun4i_pwm, val, PWM_CTRL_REG); in sun4i_pwm_config()
175 sun4i_pwm_writel(sun4i_pwm, val, PWM_CH_PRD(pwm->hwpwm)); in sun4i_pwm_config()
178 val = sun4i_pwm_readl(sun4i_pwm, PWM_CTRL_REG); in sun4i_pwm_config()
180 sun4i_pwm_writel(sun4i_pwm, val, PWM_CTRL_REG); in sun4i_pwm_config()
183 spin_unlock(&sun4i_pwm->ctrl_lock); in sun4i_pwm_config()
184 clk_disable_unprepare(sun4i_pwm->clk); in sun4i_pwm_config()
192 struct sun4i_pwm_chip *sun4i_pwm = to_sun4i_pwm_chip(chip); in sun4i_pwm_set_polarity() local
196 ret = clk_prepare_enable(sun4i_pwm->clk); in sun4i_pwm_set_polarity()
202 spin_lock(&sun4i_pwm->ctrl_lock); in sun4i_pwm_set_polarity()
203 val = sun4i_pwm_readl(sun4i_pwm, PWM_CTRL_REG); in sun4i_pwm_set_polarity()
210 sun4i_pwm_writel(sun4i_pwm, val, PWM_CTRL_REG); in sun4i_pwm_set_polarity()
212 spin_unlock(&sun4i_pwm->ctrl_lock); in sun4i_pwm_set_polarity()
213 clk_disable_unprepare(sun4i_pwm->clk); in sun4i_pwm_set_polarity()
220 struct sun4i_pwm_chip *sun4i_pwm = to_sun4i_pwm_chip(chip); in sun4i_pwm_enable() local
224 ret = clk_prepare_enable(sun4i_pwm->clk); in sun4i_pwm_enable()
230 spin_lock(&sun4i_pwm->ctrl_lock); in sun4i_pwm_enable()
231 val = sun4i_pwm_readl(sun4i_pwm, PWM_CTRL_REG); in sun4i_pwm_enable()
234 sun4i_pwm_writel(sun4i_pwm, val, PWM_CTRL_REG); in sun4i_pwm_enable()
235 spin_unlock(&sun4i_pwm->ctrl_lock); in sun4i_pwm_enable()
242 struct sun4i_pwm_chip *sun4i_pwm = to_sun4i_pwm_chip(chip); in sun4i_pwm_disable() local
245 spin_lock(&sun4i_pwm->ctrl_lock); in sun4i_pwm_disable()
246 val = sun4i_pwm_readl(sun4i_pwm, PWM_CTRL_REG); in sun4i_pwm_disable()
249 sun4i_pwm_writel(sun4i_pwm, val, PWM_CTRL_REG); in sun4i_pwm_disable()
250 spin_unlock(&sun4i_pwm->ctrl_lock); in sun4i_pwm_disable()
252 clk_disable_unprepare(sun4i_pwm->clk); in sun4i_pwm_disable()