Lines Matching refs:int_reg

751 	volatile u32 int_reg;  in ipr_mask_and_clear_interrupts()  local
772 int_reg = readl(ioa_cfg->regs.sense_interrupt_reg); in ipr_mask_and_clear_interrupts()
5311 u32 ioasc, int_reg; in ipr_cancel_op() local
5334 int_reg = readl(ioa_cfg->regs.sense_interrupt_reg); in ipr_cancel_op()
5441 u32 int_reg) in ipr_handle_other_interrupt() argument
5447 int_reg &= ~int_mask_reg; in ipr_handle_other_interrupt()
5452 if ((int_reg & IPR_PCII_OPER_INTERRUPTS) == 0) { in ipr_handle_other_interrupt()
5455 int_reg = readl(ioa_cfg->regs.sense_interrupt_reg) & ~int_mask_reg; in ipr_handle_other_interrupt()
5456 if (int_reg & IPR_PCII_IPL_STAGE_CHANGE) { in ipr_handle_other_interrupt()
5460 int_reg = readl(ioa_cfg->regs.sense_interrupt_reg) & ~int_mask_reg; in ipr_handle_other_interrupt()
5471 if (int_reg & IPR_PCII_IOA_TRANS_TO_OPER) { in ipr_handle_other_interrupt()
5474 int_reg = readl(ioa_cfg->regs.sense_interrupt_reg); in ipr_handle_other_interrupt()
5479 } else if ((int_reg & IPR_PCII_HRRQ_UPDATED) == int_reg) { in ipr_handle_other_interrupt()
5483 "Spurious interrupt detected. 0x%08X\n", int_reg); in ipr_handle_other_interrupt()
5485 int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32); in ipr_handle_other_interrupt()
5489 if (int_reg & IPR_PCII_IOA_UNIT_CHECKED) in ipr_handle_other_interrupt()
5491 else if (int_reg & IPR_PCII_NO_HOST_RRQ) in ipr_handle_other_interrupt()
5493 "No Host RRQ. 0x%08X\n", int_reg); in ipr_handle_other_interrupt()
5496 "Permanent IOA failure. 0x%08X\n", int_reg); in ipr_handle_other_interrupt()
5617 u32 int_reg = 0; in ipr_isr() local
5643 int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32); in ipr_isr()
5644 } while (int_reg & IPR_PCII_HRRQ_UPDATED && in ipr_isr()
5648 int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32); in ipr_isr()
5651 int_reg & IPR_PCII_HRRQ_UPDATED) { in ipr_isr()
5661 rc = ipr_handle_other_interrupt(ioa_cfg, int_reg); in ipr_isr()
8129 volatile u32 int_reg; in ipr_reset_next_stage() local
8149 int_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg); in ipr_reset_next_stage()
8153 int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32); in ipr_reset_next_stage()
8154 if (int_reg & IPR_PCII_IOA_TRANS_TO_OPER) { in ipr_reset_next_stage()
8159 int_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg); in ipr_reset_next_stage()
8188 volatile u32 int_reg; in ipr_reset_enable_ioa() local
8205 int_reg = readl(ioa_cfg->regs.endian_swap_reg); in ipr_reset_enable_ioa()
8208 int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32); in ipr_reset_enable_ioa()
8210 if (int_reg & IPR_PCII_IOA_TRANS_TO_OPER) { in ipr_reset_enable_ioa()
8213 int_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg); in ipr_reset_enable_ioa()
8227 int_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg); in ipr_reset_enable_ioa()
8427 u32 int_reg; in ipr_reset_restore_cfg_space() local
8443 int_reg = readl(ioa_cfg->regs.endian_swap_reg); in ipr_reset_restore_cfg_space()
9910 volatile u32 int_reg; in ipr_test_msi() local
9920 int_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg); in ipr_test_msi()
9934 int_reg = readl(ioa_cfg->regs.sense_interrupt_reg); in ipr_test_msi()