Lines Matching refs:uint32_t
80 uint32_t Revision:8;
81 uint32_t InId:24;
83 uint32_t word;
89 uint32_t CmdRsp:16;
90 uint32_t Size:16;
92 uint32_t word;
113 uint32_t PortID;
121 uint32_t PortId; /* For RFT_ID requests */
124 uint32_t rsvd0:16;
125 uint32_t rsvd1:7;
126 uint32_t fcpReg:1; /* Type 8 */
127 uint32_t rsvd2:2;
128 uint32_t ipReg:1; /* Type 5 */
129 uint32_t rsvd3:5;
131 uint32_t rsvd0:16;
132 uint32_t fcpReg:1; /* Type 8 */
133 uint32_t rsvd1:7;
134 uint32_t rsvd3:5;
135 uint32_t ipReg:1; /* Type 5 */
136 uint32_t rsvd2:2;
139 uint32_t rsvd[7];
142 uint32_t PortId; /* For RNN_ID requests */
151 uint32_t port_id;
154 uint32_t PortId;
159 uint32_t PortId;
166 uint32_t PortId;
408 uint32_t r_a_tov; /* R_A_TOV must be in B.E. format */
411 uint32_t e_d_tov; /* E_D_TOV must be in B.E. format */
496 uint32_t word0;
515 uint32_t word1;
610 uint32_t lsRjtError;
661 uint32_t nPortId32; /* Access nPortId as a word */
711 uint32_t origProcAssoc; /* FC Parm Word 1, bit 0:31 */
713 uint32_t respProcAssoc; /* FC Parm Word 2, bit 0:31 */
783 uint32_t origProcAssoc; /* FC Parm Word 1, bit 0:31 */
785 uint32_t respProcAssoc; /* FC Parm Word 2, bit 0:31 */
787 uint32_t word3Reserved1; /* FC Parm Word 3, bit 0:31 */
791 uint32_t hardAL_PA;
794 uint32_t DID;
798 uint32_t Mflags:8;
799 uint32_t Odid:24;
809 uint32_t Rflags:8;
810 uint32_t Rdid:24;
822 uint32_t Fdid;
841 uint32_t unitType;
845 uint32_t physPort;
846 uint32_t attachedNodes;
873 uint32_t portNum;
881 uint32_t linkFailureCnt;
882 uint32_t lossSyncCnt;
883 uint32_t lossSignalCnt;
884 uint32_t primSeqErrCnt;
885 uint32_t invalidXmitWord;
886 uint32_t crcCnt;
890 uint32_t rls;
900 uint32_t linkFailureCnt;
901 uint32_t lossSyncCnt;
902 uint32_t lossSignalCnt;
903 uint32_t primSeqErrCnt;
904 uint32_t invalidXmitWord;
905 uint32_t crcCnt;
909 uint32_t rrq;
916 uint32_t rrq_exchg;
929 uint32_t ratov;
930 uint32_t edtov;
931 uint32_t qtov;
951 uint32_t maxsize;
952 uint32_t index;
956 uint32_t portNum;
957 uint32_t portID;
962 uint32_t listLen;
963 uint32_t index;
970 uint32_t word;
1022 uint32_t lcb_command; /* ELS command opcode (0x81) */
1039 uint32_t lcb_ls_acc; /* Acceptance of LCB request (0x02) */
1083 uint32_t link_failure_cnt;
1084 uint32_t loss_of_synch_cnt;
1085 uint32_t loss_of_signal_cnt;
1086 uint32_t primitive_seq_proto_err;
1087 uint32_t invalid_trans_word;
1088 uint32_t invalid_crc_cnt;
1094 uint32_t tag; /* 0001 0003h */
1095 uint32_t length; /* set to size of payload struct */
1102 uint32_t port_type; /* bits 31-30 only */
1107 uint32_t tag; /* 0001 0002h */
1108 uint32_t length; /* set to size of payload struct */
1140 uint32_t tag; /* 00010001h */
1141 uint32_t length; /* set to size of payload struct */
1148 uint32_t tag; /* 0000 0003h, big endian */
1149 uint32_t length; /* size of RDP_N_PORT_ID struct */
1150 uint32_t nport_id : 12;
1151 uint32_t reserved : 8;
1156 uint32_t els_req; /* Request payload word 0 value.*/
1161 uint32_t tag; /* Descriptor tag 1 */
1162 uint32_t length; /* set to size of payload struct. */
1178 uint32_t tag;
1179 uint32_t length; /* set to size of sfp_info struct */
1184 uint32_t rdp_command; /* ELS command opcode (0x18)*/
1185 uint32_t rdp_des_length; /* RDP Payload Word 1 */
1191 uint32_t reply_sequence; /* FC word0 LS_ACC or LS_RJT */
1192 uint32_t length; /* FC Word 1 */
1218 uint32_t EntryCnt;
1219 uint32_t pe; /* Variable-length array */
1227 uint32_t AttrType:16;
1228 uint32_t AttrLen:16;
1229 uint32_t AttrValue; /* Marks start of Value (ATTRIBUTE_ENTRY) */
1236 uint32_t VendorSpecific;
1237 uint32_t SupportClass;
1238 uint32_t SupportSpeed;
1239 uint32_t PortSpeed;
1240 uint32_t MaxFrameSize;
1241 uint32_t MaxCTPayloadLen;
1242 uint32_t PortState;
1243 uint32_t PortId;
1270 uint32_t EntryCnt; /* Number of HBA attribute entries */
1466 uint32_t hostAtt; /* See definitions for Host Attention
1468 uint32_t chipAtt; /* See definitions for Chip Attention
1470 uint32_t hostStatus; /* See definitions for Host Status register */
1471 uint32_t hostControl; /* See definitions for Host Control register */
1472 uint32_t buiConfig; /* See definitions for BIU configuration
1810 uint32_t bdeAddress;
1812 uint32_t bdeReserved:4;
1813 uint32_t bdeAddrHigh:4;
1814 uint32_t bdeSize:24;
1816 uint32_t bdeSize:24;
1817 uint32_t bdeAddrHigh:4;
1818 uint32_t bdeReserved:4;
1824 uint32_t bdeFlags:8; /* BDL Flags */
1825 uint32_t bdeSize:24; /* Size of BDL array in host memory (bytes) */
1827 uint32_t bdeSize:24; /* Size of BDL array in host memory (bytes) */
1828 uint32_t bdeFlags:8; /* BDL Flags */
1831 uint32_t addrLow; /* Address 0:31 */
1832 uint32_t addrHigh; /* Address 32:63 */
1833 uint32_t ulpIoTag32; /* Can be used for 32 bit I/O Tag */
1864 uint32_t word0;
1871 uint32_t reftag; /* Reference Tag Value */
1872 uint32_t reftagtr; /* Reference Tag Translation Value */
1876 uint32_t word0;
1883 uint32_t word1;
1896 uint32_t word2;
1927 uint32_t word0;
1934 uint32_t addrHigh;
1935 uint32_t addrLow;
1942 uint32_t rsvd2:25;
1943 uint32_t acknowledgment:1;
1944 uint32_t version:1;
1945 uint32_t erase_or_prog:1;
1946 uint32_t update_flash:1;
1947 uint32_t update_ram:1;
1948 uint32_t method:1;
1949 uint32_t load_cmplt:1;
1951 uint32_t load_cmplt:1;
1952 uint32_t method:1;
1953 uint32_t update_ram:1;
1954 uint32_t update_flash:1;
1955 uint32_t erase_or_prog:1;
1956 uint32_t version:1;
1957 uint32_t acknowledgment:1;
1958 uint32_t rsvd2:25;
1961 uint32_t dl_to_adr_low;
1962 uint32_t dl_to_adr_high;
1963 uint32_t dl_len;
1965 uint32_t dl_from_mbx_offset;
1975 uint32_t rsvd1[3]; /* Read as all one's */
1976 uint32_t rsvd2; /* Read as all zero's */
1977 uint32_t portname[2]; /* N_PORT name */
1978 uint32_t nodename[2]; /* NODE name */
1981 uint32_t pref_DID:24;
1982 uint32_t hardAL_PA:8;
1984 uint32_t hardAL_PA:8;
1985 uint32_t pref_DID:24;
1988 uint32_t rsvd3[21]; /* Read as all one's */
1994 uint32_t rsvd1[3]; /* Must be all one's */
1995 uint32_t rsvd2; /* Must be all zero's */
1996 uint32_t portname[2]; /* N_PORT name */
1997 uint32_t nodename[2]; /* NODE name */
2000 uint32_t pref_DID:24;
2001 uint32_t hardAL_PA:8;
2003 uint32_t hardAL_PA:8;
2004 uint32_t pref_DID:24;
2007 uint32_t rsvd3[21]; /* Must be all one's */
2014 uint32_t rsvd1;
2029 uint32_t word1;
2034 uint32_t offset;
2042 uint32_t rsvd1:24;
2043 uint32_t lipsr_AL_PA:8; /* AL_PA to issue Lip Selective Reset to */
2045 uint32_t lipsr_AL_PA:8; /* AL_PA to issue Lip Selective Reset to */
2046 uint32_t rsvd1:24;
2071 uint32_t link_speed;
2086 uint32_t rsvd1;
2093 uint32_t cr:1;
2094 uint32_t ci:1;
2095 uint32_t cr_delay:6;
2096 uint32_t cr_count:8;
2097 uint32_t rsvd1:8;
2098 uint32_t MaxBBC:8;
2100 uint32_t MaxBBC:8;
2101 uint32_t rsvd1:8;
2102 uint32_t cr_count:8;
2103 uint32_t cr_delay:6;
2104 uint32_t ci:1;
2105 uint32_t cr:1;
2108 uint32_t myId;
2109 uint32_t rsvd2;
2110 uint32_t edtov;
2111 uint32_t arbtov;
2112 uint32_t ratov;
2113 uint32_t rttov;
2114 uint32_t altov;
2115 uint32_t crtov;
2116 uint32_t citov;
2118 uint32_t rrq_enable:1;
2119 uint32_t rrq_immed:1;
2120 uint32_t rsvd4:29;
2121 uint32_t ack0_enable:1;
2123 uint32_t ack0_enable:1;
2124 uint32_t rsvd4:29;
2125 uint32_t rrq_immed:1;
2126 uint32_t rrq_enable:1;
2149 uint32_t unused1:24;
2150 uint32_t numRing:8;
2152 uint32_t numRing:8;
2153 uint32_t unused1:24;
2157 uint32_t hbainit;
2164 uint32_t unused2:6;
2165 uint32_t recvSeq:1;
2166 uint32_t recvNotify:1;
2167 uint32_t numMask:8;
2168 uint32_t profile:8;
2169 uint32_t unused1:4;
2170 uint32_t ring:4;
2172 uint32_t ring:4;
2173 uint32_t unused1:4;
2174 uint32_t profile:8;
2175 uint32_t numMask:8;
2176 uint32_t recvNotify:1;
2177 uint32_t recvSeq:1;
2178 uint32_t unused2:6;
2195 uint32_t ring_no;
2202 uint32_t cr:1;
2203 uint32_t ci:1;
2204 uint32_t cr_delay:6;
2205 uint32_t cr_count:8;
2206 uint32_t InitBBC:8;
2207 uint32_t MaxBBC:8;
2209 uint32_t MaxBBC:8;
2210 uint32_t InitBBC:8;
2211 uint32_t cr_count:8;
2212 uint32_t cr_delay:6;
2213 uint32_t ci:1;
2214 uint32_t cr:1;
2218 uint32_t topology:8;
2219 uint32_t myDid:24;
2221 uint32_t myDid:24;
2222 uint32_t topology:8;
2227 uint32_t AR:1;
2228 uint32_t IR:1;
2229 uint32_t rsvd1:29;
2230 uint32_t ack0:1;
2232 uint32_t ack0:1;
2233 uint32_t rsvd1:29;
2234 uint32_t IR:1;
2235 uint32_t AR:1;
2238 uint32_t edtov;
2239 uint32_t arbtov;
2240 uint32_t ratov;
2241 uint32_t rttov;
2242 uint32_t altov;
2243 uint32_t lmt;
2252 uint32_t rsvd2;
2253 uint32_t rsvd3;
2254 uint32_t max_xri;
2255 uint32_t max_iocb;
2256 uint32_t max_rpi;
2257 uint32_t avail_xri;
2258 uint32_t avail_iocb;
2259 uint32_t avail_rpi;
2260 uint32_t max_vpi;
2261 uint32_t rsvd4;
2262 uint32_t rsvd5;
2263 uint32_t avail_vpi;
2270 uint32_t rsvd2:7;
2271 uint32_t recvNotify:1;
2272 uint32_t numMask:8;
2273 uint32_t profile:8;
2274 uint32_t rsvd1:4;
2275 uint32_t ring:4;
2277 uint32_t ring:4;
2278 uint32_t rsvd1:4;
2279 uint32_t profile:8;
2280 uint32_t numMask:8;
2281 uint32_t recvNotify:1;
2282 uint32_t rsvd2:7;
2320 uint32_t rsvd1;
2321 uint32_t rsvd2;
2340 uint32_t rsvd1:31;
2341 uint32_t clrCounters:1;
2345 uint32_t clrCounters:1;
2346 uint32_t rsvd1:31;
2351 uint32_t xmitByteCnt;
2352 uint32_t rcvByteCnt;
2353 uint32_t xmitFrameCnt;
2354 uint32_t rcvFrameCnt;
2355 uint32_t xmitSeqCnt;
2356 uint32_t rcvSeqCnt;
2357 uint32_t totalOrigExchanges;
2358 uint32_t totalRespExchanges;
2359 uint32_t rcvPbsyCnt;
2360 uint32_t rcvFbsyCnt;
2370 uint32_t rsvd2:8;
2371 uint32_t DID:24;
2375 uint32_t DID:24;
2376 uint32_t rsvd2:8;
2394 uint32_t rsvd2:8;
2395 uint32_t DID:24;
2396 uint32_t rsvd3:8;
2397 uint32_t SID:24;
2398 uint32_t rsvd4;
2404 uint32_t rsvd6:30;
2405 uint32_t si:1;
2406 uint32_t exchOrig:1;
2412 uint32_t DID:24;
2413 uint32_t rsvd2:8;
2414 uint32_t SID:24;
2415 uint32_t rsvd3:8;
2416 uint32_t rsvd4;
2422 uint32_t exchOrig:1;
2423 uint32_t si:1;
2424 uint32_t rsvd6:30;
2432 uint32_t cv:1;
2433 uint32_t rr:1;
2434 uint32_t rsvd2:2;
2435 uint32_t v3req:1;
2436 uint32_t v3rsp:1;
2437 uint32_t rsvd1:25;
2438 uint32_t rv:1;
2440 uint32_t rv:1;
2441 uint32_t rsvd1:25;
2442 uint32_t v3rsp:1;
2443 uint32_t v3req:1;
2444 uint32_t rsvd2:2;
2445 uint32_t rr:1;
2446 uint32_t cv:1;
2449 uint32_t biuRev;
2450 uint32_t smRev;
2452 uint32_t smFwRev;
2474 uint32_t endecRev;
2487 uint32_t postKernRev;
2488 uint32_t opFwRev;
2490 uint32_t sli1FwRev;
2492 uint32_t sli2FwRev;
2494 uint32_t sli3Feat;
2495 uint32_t RandomData[6];
2501 uint32_t rsvd1;
2502 uint32_t linkFailureCnt;
2503 uint32_t lossSyncCnt;
2505 uint32_t lossSignalCnt;
2506 uint32_t primSeqErrCnt;
2507 uint32_t invalidXmitWord;
2508 uint32_t crcCnt;
2509 uint32_t primSeqTimeout;
2510 uint32_t elasticOverrun;
2511 uint32_t arbTimeout;
2521 uint32_t rsvd2:8;
2522 uint32_t did:24;
2526 uint32_t did:24;
2527 uint32_t rsvd2:8;
2558 uint32_t word;
2567 uint32_t rsvd2;
2568 uint32_t rsvd3;
2569 uint32_t rsvd4;
2570 uint32_t rsvd5;
2576 uint32_t rsvd2;
2577 uint32_t rsvd3;
2578 uint32_t rsvd4;
2579 uint32_t rsvd5;
2588 uint32_t rsvd1;
2589 uint32_t rsvd2:7;
2590 uint32_t upd:1;
2591 uint32_t sid:24;
2592 uint32_t wwn[2];
2593 uint32_t rsvd5;
2597 uint32_t rsvd1;
2598 uint32_t sid:24;
2599 uint32_t upd:1;
2600 uint32_t rsvd2:7;
2601 uint32_t wwn[2];
2602 uint32_t rsvd5;
2610 uint32_t rsvd1;
2618 uint32_t rsvd3;
2619 uint32_t rsvd4;
2620 uint32_t rsvd5;
2633 uint32_t did;
2634 uint32_t rsvd2;
2635 uint32_t rsvd3;
2636 uint32_t rsvd4;
2637 uint32_t rsvd5;
2649 uint32_t eventTag; /* Event tag */
2650 uint32_t word2;
2669 uint32_t word3;
2688 uint32_t word7;
2707 uint32_t word8;
2739 uint32_t eventTag; /* Event tag */
2740 uint32_t rsvd1;
2747 uint32_t rsvd:25;
2748 uint32_t ra:1;
2749 uint32_t co:1;
2750 uint32_t cv:1;
2751 uint32_t type:4;
2752 uint32_t entry_index:16;
2753 uint32_t region_id:16;
2755 uint32_t type:4;
2756 uint32_t cv:1;
2757 uint32_t co:1;
2758 uint32_t ra:1;
2759 uint32_t rsvd:25;
2760 uint32_t region_id:16;
2761 uint32_t entry_index:16;
2764 uint32_t sli4_length;
2765 uint32_t word_cnt;
2766 uint32_t resp_offset;
2799 uint32_t signature;
2800 uint32_t rev;
2802 uint32_t resvd[66];
2810 uint32_t ver:4; /* Major Version */
2811 uint32_t rev:4; /* Revision */
2812 uint32_t lev:2; /* Level */
2813 uint32_t dist:2; /* Dist Type */
2814 uint32_t num:4; /* number after dist type */
2816 uint32_t num:4; /* number after dist type */
2817 uint32_t dist:2; /* Dist Type */
2818 uint32_t lev:2; /* Level */
2819 uint32_t rev:4; /* Revision */
2820 uint32_t ver:4; /* Major Version */
2830 uint32_t rsvd2:16;
2831 uint32_t type:8;
2832 uint32_t rsvd:1;
2833 uint32_t ra:1;
2834 uint32_t co:1;
2835 uint32_t cv:1;
2836 uint32_t req:4;
2837 uint32_t entry_length:16;
2838 uint32_t region_id:16;
2840 uint32_t req:4;
2841 uint32_t cv:1;
2842 uint32_t co:1;
2843 uint32_t ra:1;
2844 uint32_t rsvd:1;
2845 uint32_t type:8;
2846 uint32_t rsvd2:16;
2847 uint32_t region_id:16;
2848 uint32_t entry_length:16;
2851 uint32_t resp_info;
2852 uint32_t byte_cnt;
2853 uint32_t data_offset;
2875 uint32_t rsvd1 :7;
2876 uint32_t recvNotify :1; /* Receive Notification */
2877 uint32_t numMask :8; /* # Mask Entries */
2878 uint32_t profile :8; /* Selection Profile */
2879 uint32_t rsvd2 :8;
2881 uint32_t rsvd2 :8;
2882 uint32_t profile :8; /* Selection Profile */
2883 uint32_t numMask :8; /* # Mask Entries */
2884 uint32_t recvNotify :1; /* Receive Notification */
2885 uint32_t rsvd1 :7;
2889 uint32_t hbqId :16;
2890 uint32_t rsvd3 :12;
2891 uint32_t ringMask :4;
2893 uint32_t ringMask :4;
2894 uint32_t rsvd3 :12;
2895 uint32_t hbqId :16;
2899 uint32_t entry_count :16;
2900 uint32_t rsvd4 :8;
2901 uint32_t headerLen :8;
2903 uint32_t headerLen :8;
2904 uint32_t rsvd4 :8;
2905 uint32_t entry_count :16;
2908 uint32_t hbqaddrLow;
2909 uint32_t hbqaddrHigh;
2912 uint32_t rsvd5 :31;
2913 uint32_t logEntry :1;
2915 uint32_t logEntry :1;
2916 uint32_t rsvd5 :31;
2919 uint32_t rsvd6; /* w7 */
2920 uint32_t rsvd7; /* w8 */
2921 uint32_t rsvd8; /* w9 */
2927 uint32_t allprofiles[12];
2931 uint32_t seqlenoff :16;
2932 uint32_t maxlen :16;
2934 uint32_t maxlen :16;
2935 uint32_t seqlenoff :16;
2938 uint32_t rsvd1 :28;
2939 uint32_t seqlenbcnt :4;
2941 uint32_t seqlenbcnt :4;
2942 uint32_t rsvd1 :28;
2944 uint32_t rsvd[10];
2949 uint32_t seqlenoff :16;
2950 uint32_t maxlen :16;
2952 uint32_t maxlen :16;
2953 uint32_t seqlenoff :16;
2956 uint32_t cmdcodeoff :28;
2957 uint32_t rsvd1 :12;
2958 uint32_t seqlenbcnt :4;
2960 uint32_t seqlenbcnt :4;
2961 uint32_t rsvd1 :12;
2962 uint32_t cmdcodeoff :28;
2964 uint32_t cmdmatch[8];
2966 uint32_t rsvd[2];
2971 uint32_t seqlenoff :16;
2972 uint32_t maxlen :16;
2974 uint32_t maxlen :16;
2975 uint32_t seqlenoff :16;
2978 uint32_t cmdcodeoff :28;
2979 uint32_t rsvd1 :12;
2980 uint32_t seqlenbcnt :4;
2982 uint32_t seqlenbcnt :4;
2983 uint32_t rsvd1 :12;
2984 uint32_t cmdcodeoff :28;
2986 uint32_t cmdmatch[8];
2988 uint32_t rsvd[2];
3000 uint32_t cBE : 1;
3001 uint32_t cET : 1;
3002 uint32_t cHpcb : 1;
3003 uint32_t cMA : 1;
3004 uint32_t sli_mode : 4;
3005 uint32_t pcbLen : 24; /* bit 23:0 of memory based port
3008 uint32_t pcbLen : 24; /* bit 23:0 of memory based port
3010 uint32_t sli_mode : 4;
3011 uint32_t cMA : 1;
3012 uint32_t cHpcb : 1;
3013 uint32_t cET : 1;
3014 uint32_t cBE : 1;
3017 uint32_t pcbLow; /* bit 31:0 of memory based port config block */
3018 uint32_t pcbHigh; /* bit 63:32 of memory based port config block */
3019 uint32_t hbainit[5];
3021 uint32_t hps : 1; /* bit 31 word9 Host Pointer in slim */
3022 uint32_t rsvd : 31; /* least significant 31 bits of word 9 */
3024 uint32_t rsvd : 31; /* least significant 31 bits of word 9 */
3025 uint32_t hps : 1; /* bit 31 word9 Host Pointer in slim */
3029 uint32_t rsvd1 : 19; /* Reserved */
3030 uint32_t cdss : 1; /* Configure Data Security SLI */
3031 uint32_t casabt : 1; /* Configure async abts status notice */
3032 uint32_t rsvd2 : 2; /* Reserved */
3033 uint32_t cbg : 1; /* Configure BlockGuard */
3034 uint32_t cmv : 1; /* Configure Max VPIs */
3035 uint32_t ccrp : 1; /* Config Command Ring Polling */
3036 uint32_t csah : 1; /* Configure Synchronous Abort Handling */
3037 uint32_t chbs : 1; /* Cofigure Host Backing store */
3038 uint32_t cinb : 1; /* Enable Interrupt Notification Block */
3039 uint32_t cerbm : 1; /* Configure Enhanced Receive Buf Mgmt */
3040 uint32_t cmx : 1; /* Configure Max XRIs */
3041 uint32_t cmr : 1; /* Configure Max RPIs */
3043 uint32_t cmr : 1; /* Configure Max RPIs */
3044 uint32_t cmx : 1; /* Configure Max XRIs */
3045 uint32_t cerbm : 1; /* Configure Enhanced Receive Buf Mgmt */
3046 uint32_t cinb : 1; /* Enable Interrupt Notification Block */
3047 uint32_t chbs : 1; /* Cofigure Host Backing store */
3048 uint32_t csah : 1; /* Configure Synchronous Abort Handling */
3049 uint32_t ccrp : 1; /* Config Command Ring Polling */
3050 uint32_t cmv : 1; /* Configure Max VPIs */
3051 uint32_t cbg : 1; /* Configure BlockGuard */
3052 uint32_t rsvd2 : 2; /* Reserved */
3053 uint32_t casabt : 1; /* Configure async abts status notice */
3054 uint32_t cdss : 1; /* Configure Data Security SLI */
3055 uint32_t rsvd1 : 19; /* Reserved */
3058 uint32_t rsvd3 : 19; /* Reserved */
3059 uint32_t gdss : 1; /* Configure Data Security SLI */
3060 uint32_t gasabt : 1; /* Grant async abts status notice */
3061 uint32_t rsvd4 : 2; /* Reserved */
3062 uint32_t gbg : 1; /* Grant BlockGuard */
3063 uint32_t gmv : 1; /* Grant Max VPIs */
3064 uint32_t gcrp : 1; /* Grant Command Ring Polling */
3065 uint32_t gsah : 1; /* Grant Synchronous Abort Handling */
3066 uint32_t ghbs : 1; /* Grant Host Backing Store */
3067 uint32_t ginb : 1; /* Grant Interrupt Notification Block */
3068 uint32_t gerbm : 1; /* Grant ERBM Request */
3069 uint32_t gmx : 1; /* Grant Max XRIs */
3070 uint32_t gmr : 1; /* Grant Max RPIs */
3072 uint32_t gmr : 1; /* Grant Max RPIs */
3073 uint32_t gmx : 1; /* Grant Max XRIs */
3074 uint32_t gerbm : 1; /* Grant ERBM Request */
3075 uint32_t ginb : 1; /* Grant Interrupt Notification Block */
3076 uint32_t ghbs : 1; /* Grant Host Backing Store */
3077 uint32_t gsah : 1; /* Grant Synchronous Abort Handling */
3078 uint32_t gcrp : 1; /* Grant Command Ring Polling */
3079 uint32_t gmv : 1; /* Grant Max VPIs */
3080 uint32_t gbg : 1; /* Grant BlockGuard */
3081 uint32_t rsvd4 : 2; /* Reserved */
3082 uint32_t gasabt : 1; /* Grant async abts status notice */
3083 uint32_t gdss : 1; /* Configure Data Security SLI */
3084 uint32_t rsvd3 : 19; /* Reserved */
3088 uint32_t max_rpi : 16; /* Max RPIs Port should configure */
3089 uint32_t max_xri : 16; /* Max XRIs Port should configure */
3091 uint32_t max_xri : 16; /* Max XRIs Port should configure */
3092 uint32_t max_rpi : 16; /* Max RPIs Port should configure */
3096 uint32_t max_hbq : 16; /* Max HBQs Host expect to configure */
3097 uint32_t rsvd5 : 16; /* Max HBQs Host expect to configure */
3099 uint32_t rsvd5 : 16; /* Max HBQs Host expect to configure */
3100 uint32_t max_hbq : 16; /* Max HBQs Host expect to configure */
3103 uint32_t rsvd6; /* Reserved */
3106 uint32_t fips_rev : 3; /* FIPS Spec Revision */
3107 uint32_t fips_level : 4; /* FIPS Level */
3108 uint32_t sec_err : 9; /* security crypto error */
3109 uint32_t max_vpi : 16; /* Max number of virt N-Ports */
3111 uint32_t max_vpi : 16; /* Max number of virt N-Ports */
3112 uint32_t sec_err : 9; /* security crypto error */
3113 uint32_t fips_level : 4; /* FIPS Level */
3114 uint32_t fips_rev : 3; /* FIPS Spec Revision */
3122 uint32_t dfltMsgNum:8; /* Default message number */
3123 uint32_t rsvd1:11; /* Reserved */
3124 uint32_t NID:5; /* Number of secondary attention IDs */
3125 uint32_t rsvd2:5; /* Reserved */
3126 uint32_t dfltPresent:1; /* Default message number present */
3127 uint32_t addFlag:1; /* Add association flag */
3128 uint32_t reportFlag:1; /* Report association flag */
3130 uint32_t reportFlag:1; /* Report association flag */
3131 uint32_t addFlag:1; /* Add association flag */
3132 uint32_t dfltPresent:1; /* Default message number present */
3133 uint32_t rsvd2:5; /* Reserved */
3134 uint32_t NID:5; /* Number of secondary attention IDs */
3135 uint32_t rsvd1:11; /* Reserved */
3136 uint32_t dfltMsgNum:8; /* Default message number */
3138 uint32_t attentionConditions[2];
3142 uint32_t autoClearHA[2];
3144 uint32_t rsvd3:16;
3145 uint32_t autoClearID:16;
3147 uint32_t autoClearID:16;
3148 uint32_t rsvd3:16;
3150 uint32_t rsvd4;
3159 uint32_t cmdEntries;
3160 uint32_t cmdAddrLow;
3161 uint32_t cmdAddrHigh;
3163 uint32_t rspEntries;
3164 uint32_t rspAddrLow;
3165 uint32_t rspAddrHigh;
3170 uint32_t type:8;
3172 uint32_t feature:8;
3174 uint32_t rsvd:12;
3175 uint32_t maxRing:4;
3177 uint32_t maxRing:4;
3178 uint32_t rsvd:12;
3179 uint32_t feature:8;
3181 uint32_t type:8;
3185 uint32_t mailBoxSize;
3186 uint32_t mbAddrLow;
3187 uint32_t mbAddrHigh;
3189 uint32_t hgpAddrLow;
3190 uint32_t hgpAddrHigh;
3192 uint32_t pgpAddrLow;
3193 uint32_t pgpAddrHigh;
3200 uint32_t rsvd0:27;
3201 uint32_t discardFarp:1;
3202 uint32_t IPEnable:1;
3203 uint32_t nodeName:1;
3204 uint32_t portName:1;
3205 uint32_t filterEnable:1;
3207 uint32_t filterEnable:1;
3208 uint32_t portName:1;
3209 uint32_t nodeName:1;
3210 uint32_t IPEnable:1;
3211 uint32_t discardFarp:1;
3212 uint32_t rsvd:27;
3217 uint32_t rsvd1;
3218 uint32_t rsvd2;
3219 uint32_t rsvd3;
3220 uint32_t IPAddress;
3227 uint32_t rsvd:30;
3228 uint32_t ring:2; /* Ring for ASYNC_EVENT iocb Bits 0-1*/
3230 uint32_t ring:2; /* Ring for ASYNC_EVENT iocb Bits 0-1*/
3231 uint32_t rsvd:30;
3237 #define MAILBOX_CMD_SIZE (MAILBOX_CMD_WSIZE * sizeof(uint32_t))
3240 #define MAILBOX_EXT_SIZE (MAILBOX_EXT_WSIZE * sizeof(uint32_t))
3246 uint32_t varWords[MAILBOX_CMD_WSIZE - 1]; /* first word is type/
3303 uint32_t unused1[16];
3310 uint32_t reserved[8];
3311 uint32_t hbq_put[16];
3316 uint32_t hbq_get[16];
3467 uint32_t reserved;
3472 uint32_t reserved[4];
3479 uint32_t xrsqRo; /* Starting Relative Offset */
3489 uint32_t word4Rsvd:7;
3490 uint32_t fl:1;
3491 uint32_t myID:24;
3492 uint32_t word5Rsvd:8;
3493 uint32_t remoteID:24;
3495 uint32_t myID:24;
3496 uint32_t fl:1;
3497 uint32_t word4Rsvd:7;
3498 uint32_t remoteID:24;
3499 uint32_t word5Rsvd:8;
3506 uint32_t parmRo;
3509 uint32_t word5Rsvd:8;
3510 uint32_t remoteID:24;
3512 uint32_t remoteID:24;
3513 uint32_t word5Rsvd:8;
3519 uint32_t rsvd[3];
3520 uint32_t abortType;
3523 uint32_t parm;
3535 uint32_t rsvd[3];
3536 uint32_t abortType;
3537 uint32_t parm;
3538 uint32_t iotag32;
3543 uint32_t rsvd[4];
3544 uint32_t parmRo;
3546 uint32_t word5Rsvd:8;
3547 uint32_t remoteID:24;
3549 uint32_t remoteID:24;
3550 uint32_t word5Rsvd:8;
3558 uint32_t fcpi_parm;
3559 uint32_t fcpi_XRdy; /* transfer ready for IWRITE */
3565 uint32_t fcpt_Offset;
3566 uint32_t fcpt_Length; /* transfer ready for IWRITE */
3574 uint32_t xrsqRo; /* Starting Relative Offset */
3584 uint32_t rsvd1;
3585 uint32_t xrsqRo; /* Starting Relative Offset */
3593 uint32_t word4Rsvd:7;
3594 uint32_t fl:1;
3595 uint32_t myID:24;
3596 uint32_t word5Rsvd:8;
3597 uint32_t remoteID:24;
3599 uint32_t myID:24;
3600 uint32_t fl:1;
3601 uint32_t word4Rsvd:7;
3602 uint32_t remoteID:24;
3603 uint32_t word5Rsvd:8;
3610 uint32_t xrsqRo; /* Starting Relative Offset */
3617 uint32_t rcvd1;
3618 uint32_t parmRo;
3621 uint32_t word5Rsvd:8;
3622 uint32_t remoteID:24;
3624 uint32_t remoteID:24;
3625 uint32_t word5Rsvd:8;
3632 uint32_t hbq_1;
3633 uint32_t parmRo;
3635 uint32_t rctl:8;
3636 uint32_t type:8;
3637 uint32_t dfctl:8;
3638 uint32_t ls:1;
3639 uint32_t fs:1;
3640 uint32_t rsvd2:3;
3641 uint32_t si:1;
3642 uint32_t bc:1;
3643 uint32_t rsvd3:1;
3645 uint32_t rsvd3:1;
3646 uint32_t bc:1;
3647 uint32_t si:1;
3648 uint32_t rsvd2:3;
3649 uint32_t fs:1;
3650 uint32_t ls:1;
3651 uint32_t dfctl:8;
3652 uint32_t type:8;
3653 uint32_t rctl:8;
3660 uint32_t fcpi_parm;
3661 uint32_t fcpi_XRdy; /* transfer ready for IWRITE */
3667 uint32_t fcpt_Offset;
3668 uint32_t fcpt_Length; /* transfer ready for IWRITE */
3673 uint32_t rsvd[4];
3674 uint32_t param;
3704 uint32_t word10Rsvd;
3705 uint32_t acc_len; /* accumulated length */
3712 uint32_t buffer_tag;
3718 uint32_t rsvd;
3719 uint32_t rsvd1;
3723 uint32_t iotag64_low;
3724 uint32_t iotag64_high;
3725 uint32_t ebde_count;
3726 uint32_t rsvd;
3731 uint32_t filler[6]; /* word 8-13 in IOCB */
3732 uint32_t bghm; /* word 14 - BlockGuard High Water Mark */
3752 uint32_t bgstat; /* word 15 - BlockGuard Status */
3755 static inline uint32_t
3756 lpfc_bgs_get_bidir_bg_prof(uint32_t bgstat) in lpfc_bgs_get_bidir_bg_prof()
3762 static inline uint32_t
3763 lpfc_bgs_get_bidir_err_cond(uint32_t bgstat) in lpfc_bgs_get_bidir_err_cond()
3769 static inline uint32_t
3770 lpfc_bgs_get_bg_prof(uint32_t bgstat) in lpfc_bgs_get_bg_prof()
3776 static inline uint32_t
3777 lpfc_bgs_get_invalid_prof(uint32_t bgstat) in lpfc_bgs_get_invalid_prof()
3783 static inline uint32_t
3784 lpfc_bgs_get_uninit_dif_block(uint32_t bgstat) in lpfc_bgs_get_uninit_dif_block()
3790 static inline uint32_t
3791 lpfc_bgs_get_hi_water_mark_present(uint32_t bgstat) in lpfc_bgs_get_hi_water_mark_present()
3797 static inline uint32_t
3798 lpfc_bgs_get_reftag_err(uint32_t bgstat) in lpfc_bgs_get_reftag_err()
3804 static inline uint32_t
3805 lpfc_bgs_get_apptag_err(uint32_t bgstat) in lpfc_bgs_get_apptag_err()
3811 static inline uint32_t
3812 lpfc_bgs_get_guard_err(uint32_t bgstat) in lpfc_bgs_get_guard_err()
3820 uint32_t io_tag64_low;
3821 uint32_t io_tag64_high;
3833 uint32_t reserved4;
3865 uint32_t ulpWord[IOCB_WORD_SZ - 2]; /* generic 6 'words' */
3894 uint32_t ulpTimeout:8;
3895 uint32_t ulpXS:1;
3896 uint32_t ulpFCP2Rcvy:1;
3897 uint32_t ulpPU:2;
3898 uint32_t ulpIr:1;
3899 uint32_t ulpClass:3;
3900 uint32_t ulpCommand:8;
3901 uint32_t ulpStatus:4;
3902 uint32_t ulpBdeCount:2;
3903 uint32_t ulpLe:1;
3904 uint32_t ulpOwner:1; /* Low order bit word 7 */
3906 uint32_t ulpOwner:1; /* Low order bit word 7 */
3907 uint32_t ulpLe:1;
3908 uint32_t ulpBdeCount:2;
3909 uint32_t ulpStatus:4;
3910 uint32_t ulpCommand:8;
3911 uint32_t ulpClass:3;
3912 uint32_t ulpIr:1;
3913 uint32_t ulpPU:2;
3914 uint32_t ulpFCP2Rcvy:1;
3915 uint32_t ulpXS:1;
3916 uint32_t ulpTimeout:8;
3925 uint32_t sli3Words[24]; /* 96 extra bytes for SLI-3 */
3979 sizeof(uint32_t) * MAILBOX_EXT_WSIZE))
3987 uint32_t mbx_ext_words[MAILBOX_EXT_WSIZE];