Lines Matching refs:U32
162 U32 Doorbell; /*0x00 */
163 U32 WriteSequence; /*0x04 */
164 U32 HostDiagnostic; /*0x08 */
165 U32 Reserved1; /*0x0C */
166 U32 DiagRWData; /*0x10 */
167 U32 DiagRWAddressLow; /*0x14 */
168 U32 DiagRWAddressHigh; /*0x18 */
169 U32 Reserved2[5]; /*0x1C */
170 U32 HostInterruptStatus; /*0x30 */
171 U32 HostInterruptMask; /*0x34 */
172 U32 DCRData; /*0x38 */
173 U32 DCRAddress; /*0x3C */
174 U32 Reserved3[2]; /*0x40 */
175 U32 ReplyFreeHostIndex; /*0x48 */
176 U32 Reserved4[8]; /*0x4C */
177 U32 ReplyPostHostIndex; /*0x6C */
178 U32 Reserved5; /*0x70 */
179 U32 HCBSize; /*0x74 */
180 U32 HCBAddressLow; /*0x78 */
181 U32 HCBAddressHigh; /*0x7C */
182 U32 Reserved6[16]; /*0x80 */
183 U32 RequestDescriptorPostLow; /*0xC0 */
184 U32 RequestDescriptorPostHigh; /*0xC4 */
185 U32 Reserved7[14]; /*0xC8 */
418 U32 DescriptorTypeDependent2; /*0x04 */
443 U32 ReplyFrameAddress; /*0x04 */
497 U32 Reserved; /*0x04 */
719 U32 IOCLogInfo; /*0x10 */
734 U32 Word;
756 U32 FlagsLength;
757 U32 Address;
762 U32 FlagsLength;
768 U32 FlagsLength;
770 U32 Address32;
786 U32 Address;
803 U32 Address32;
820 U32 TransactionContext[1];
821 U32 TransactionDetails[1];
832 U32 TransactionContext[2];
833 U32 TransactionDetails[1];
844 U32 TransactionContext[3];
845 U32 TransactionDetails[1];
854 U32 TransactionContext[4];
855 U32 TransactionDetails[1];
865 U32 TransactionContext32[1];
866 U32 TransactionContext64[2];
867 U32 TransactionContext96[3];
868 U32 TransactionContext128[4];
870 U32 TransactionDetails[1];
973 #define MPI2_SGE_SET_FLAGS(f) ((U32)(f) << MPI2_SGE_FLAGS_SHIFT)
1008 U32 Address;
1009 U32 FlagsLength;
1015 U32 Length;
1051 U32 Length;
1117 #define MPI2_IEEE32_SGE_SET_FLAGS(f) ((U32)(f) << MPI2_IEEE32_SGE_FLAGS_SHIFT)