106 	mpc8xxx_spi_write_reg(espi_mode, tmp & ~SPMODE_ENABLE);  in fsl_espi_change_mode()
107 	mpc8xxx_spi_write_reg(mode, cs->hw_mode);  in fsl_espi_change_mode()
108 	mpc8xxx_spi_write_reg(espi_mode, tmp);  in fsl_espi_change_mode()
211 	mpc8xxx_spi_write_reg(&reg_base->mask, SPIM_NE);  in fsl_espi_cpu_bufs()
215 	mpc8xxx_spi_write_reg(&reg_base->transmit, word);  in fsl_espi_cpu_bufs()
241 	mpc8xxx_spi_write_reg(&reg_base->command,  in fsl_espi_bufs()
251 	mpc8xxx_spi_write_reg(&reg_base->mask, 0);  in fsl_espi_bufs()
512 	mpc8xxx_spi_write_reg(&reg_base->mode, loop_mode);  in fsl_espi_setup()
578 			mpc8xxx_spi_write_reg(&reg_base->event, events);  in fsl_espi_cpu_irq()
585 	mpc8xxx_spi_write_reg(&reg_base->event, events);  in fsl_espi_cpu_irq()
591 		mpc8xxx_spi_write_reg(&reg_base->transmit, word);  in fsl_espi_cpu_irq()
626 	mpc8xxx_spi_write_reg(&reg_base->mode, regval);  in fsl_espi_runtime_suspend()
640 	mpc8xxx_spi_write_reg(&reg_base->mode, regval);  in fsl_espi_runtime_resume()
696 	mpc8xxx_spi_write_reg(&reg_base->mode, 0);  in fsl_espi_probe()
697 	mpc8xxx_spi_write_reg(&reg_base->mask, 0);  in fsl_espi_probe()
698 	mpc8xxx_spi_write_reg(&reg_base->command, 0);  in fsl_espi_probe()
699 	mpc8xxx_spi_write_reg(&reg_base->event, 0xffffffff);  in fsl_espi_probe()
724 		mpc8xxx_spi_write_reg(&reg_base->csmode[i], csmode);  in fsl_espi_probe()
732 	mpc8xxx_spi_write_reg(&reg_base->mode, regval);  in fsl_espi_probe()
858 	mpc8xxx_spi_write_reg(&reg_base->mode, 0);  in of_fsl_espi_resume()
859 	mpc8xxx_spi_write_reg(&reg_base->mask, 0);  in of_fsl_espi_resume()
860 	mpc8xxx_spi_write_reg(&reg_base->command, 0);  in of_fsl_espi_resume()
861 	mpc8xxx_spi_write_reg(&reg_base->event, 0xffffffff);  in of_fsl_espi_resume()
865 		mpc8xxx_spi_write_reg(&reg_base->csmode[i], CSMODE_INIT_VAL);  in of_fsl_espi_resume()
870 	mpc8xxx_spi_write_reg(&reg_base->mode, regval);  in of_fsl_espi_resume()