88 	struct mpc8xxx_spi *mspi = spi_master_get_devdata(spi->master);  in fsl_spi_change_mode()
113 	struct mpc8xxx_spi *mpc8xxx_spi = spi_master_get_devdata(spi->master);  in fsl_spi_chipselect()  local
126 		mpc8xxx_spi->rx_shift = cs->rx_shift;  in fsl_spi_chipselect()
127 		mpc8xxx_spi->tx_shift = cs->tx_shift;  in fsl_spi_chipselect()
128 		mpc8xxx_spi->get_rx = cs->get_rx;  in fsl_spi_chipselect()
129 		mpc8xxx_spi->get_tx = cs->get_tx;  in fsl_spi_chipselect()
174 				struct mpc8xxx_spi *mpc8xxx_spi,  in mspi_apply_cpu_mode_quirks()  argument
191 	if (mpc8xxx_spi->set_shifts)  in mspi_apply_cpu_mode_quirks()
192 		mpc8xxx_spi->set_shifts(&cs->rx_shift, &cs->tx_shift,  in mspi_apply_cpu_mode_quirks()
196 	mpc8xxx_spi->rx_shift = cs->rx_shift;  in mspi_apply_cpu_mode_quirks()
197 	mpc8xxx_spi->tx_shift = cs->tx_shift;  in mspi_apply_cpu_mode_quirks()
198 	mpc8xxx_spi->get_rx = cs->get_rx;  in mspi_apply_cpu_mode_quirks()
199 	mpc8xxx_spi->get_tx = cs->get_tx;  in mspi_apply_cpu_mode_quirks()
225 	struct mpc8xxx_spi *mpc8xxx_spi;  in fsl_spi_setup_transfer()  local
231 	mpc8xxx_spi = spi_master_get_devdata(spi->master);  in fsl_spi_setup_transfer()
245 	if (!(mpc8xxx_spi->flags & SPI_CPM_MODE))  in fsl_spi_setup_transfer()
247 							   mpc8xxx_spi,  in fsl_spi_setup_transfer()
249 	else if (mpc8xxx_spi->flags & SPI_QE)  in fsl_spi_setup_transfer()
267 	if ((mpc8xxx_spi->spibrg / hz) > 64) {  in fsl_spi_setup_transfer()
269 		pm = (mpc8xxx_spi->spibrg - 1) / (hz * 64) + 1;  in fsl_spi_setup_transfer()
273 			  hz, mpc8xxx_spi->spibrg / 1024);  in fsl_spi_setup_transfer()
277 		pm = (mpc8xxx_spi->spibrg - 1) / (hz * 4) + 1;  in fsl_spi_setup_transfer()
288 static int fsl_spi_cpu_bufs(struct mpc8xxx_spi *mspi,  in fsl_spi_cpu_bufs()
309 	struct mpc8xxx_spi *mpc8xxx_spi = spi_master_get_devdata(spi->master);  in fsl_spi_bufs()  local
315 	reg_base = mpc8xxx_spi->reg_base;  in fsl_spi_bufs()
333 	mpc8xxx_spi->tx = t->tx_buf;  in fsl_spi_bufs()
334 	mpc8xxx_spi->rx = t->rx_buf;  in fsl_spi_bufs()
336 	reinit_completion(&mpc8xxx_spi->done);  in fsl_spi_bufs()
338 	if (mpc8xxx_spi->flags & SPI_CPM_MODE)  in fsl_spi_bufs()
339 		ret = fsl_spi_cpm_bufs(mpc8xxx_spi, t, is_dma_mapped);  in fsl_spi_bufs()
341 		ret = fsl_spi_cpu_bufs(mpc8xxx_spi, t, len);  in fsl_spi_bufs()
345 	wait_for_completion(&mpc8xxx_spi->done);  in fsl_spi_bufs()
350 	if (mpc8xxx_spi->flags & SPI_CPM_MODE)  in fsl_spi_bufs()
351 		fsl_spi_cpm_bufs_complete(mpc8xxx_spi);  in fsl_spi_bufs()
353 	return mpc8xxx_spi->count;  in fsl_spi_bufs()
424 	struct mpc8xxx_spi *mpc8xxx_spi;  in fsl_spi_setup()  local
439 	mpc8xxx_spi = spi_master_get_devdata(spi->master);  in fsl_spi_setup()
441 	reg_base = mpc8xxx_spi->reg_base;  in fsl_spi_setup()
464 	if (mpc8xxx_spi->type == TYPE_GRLIB) {  in fsl_spi_setup()
498 	struct mpc8xxx_spi *mpc8xxx_spi = spi_master_get_devdata(spi->master);  in fsl_spi_cleanup()  local
501 	if (mpc8xxx_spi->type == TYPE_GRLIB && gpio_is_valid(spi->cs_gpio))  in fsl_spi_cleanup()
508 static void fsl_spi_cpu_irq(struct mpc8xxx_spi *mspi, u32 events)  in fsl_spi_cpu_irq()
542 	struct mpc8xxx_spi *mspi = context_data;  in fsl_spi_irq()
564 	struct mpc8xxx_spi *mpc8xxx_spi = spi_master_get_devdata(spi->master);  in fsl_spi_grlib_cs_control()  local
565 	struct fsl_spi_reg *reg_base = mpc8xxx_spi->reg_base;  in fsl_spi_grlib_cs_control()
571 	} else if (cs < mpc8xxx_spi->native_chipselects) {  in fsl_spi_grlib_cs_control()
582 	struct mpc8xxx_spi *mpc8xxx_spi = spi_master_get_devdata(master);  in fsl_spi_grlib_probe()  local
583 	struct fsl_spi_reg *reg_base = mpc8xxx_spi->reg_base;  in fsl_spi_grlib_probe()
589 	mpc8xxx_spi->set_shifts = fsl_spi_grlib_set_shifts;  in fsl_spi_grlib_probe()
592 		mpc8xxx_spi->max_bits_per_word = mbits + 1;  in fsl_spi_grlib_probe()
594 	mpc8xxx_spi->native_chipselects = 0;  in fsl_spi_grlib_probe()
596 		mpc8xxx_spi->native_chipselects = SPCAP_SSSZ(capabilities);  in fsl_spi_grlib_probe()
599 	master->num_chipselect = mpc8xxx_spi->native_chipselects;  in fsl_spi_grlib_probe()
608 	struct mpc8xxx_spi *mpc8xxx_spi;  in fsl_spi_probe()  local
613 	master = spi_alloc_master(dev, sizeof(struct mpc8xxx_spi));  in fsl_spi_probe()
627 	mpc8xxx_spi = spi_master_get_devdata(master);  in fsl_spi_probe()
628 	mpc8xxx_spi->max_bits_per_word = 32;  in fsl_spi_probe()
629 	mpc8xxx_spi->type = fsl_spi_get_type(dev);  in fsl_spi_probe()
631 	ret = fsl_spi_cpm_init(mpc8xxx_spi);  in fsl_spi_probe()
635 	mpc8xxx_spi->reg_base = devm_ioremap_resource(dev, mem);  in fsl_spi_probe()
636 	if (IS_ERR(mpc8xxx_spi->reg_base)) {  in fsl_spi_probe()
637 		ret = PTR_ERR(mpc8xxx_spi->reg_base);  in fsl_spi_probe()
641 	if (mpc8xxx_spi->type == TYPE_GRLIB)  in fsl_spi_probe()
646 		SPI_BPW_RANGE_MASK(1, mpc8xxx_spi->max_bits_per_word);  in fsl_spi_probe()
648 	if (mpc8xxx_spi->flags & SPI_QE_CPU_MODE)  in fsl_spi_probe()
649 		mpc8xxx_spi->set_shifts = fsl_spi_qe_cpu_set_shifts;  in fsl_spi_probe()
651 	if (mpc8xxx_spi->set_shifts)  in fsl_spi_probe()
653 		mpc8xxx_spi->set_shifts(&mpc8xxx_spi->rx_shift,  in fsl_spi_probe()
654 					&mpc8xxx_spi->tx_shift, 8, 1);  in fsl_spi_probe()
657 	ret = devm_request_irq(dev, mpc8xxx_spi->irq, fsl_spi_irq,  in fsl_spi_probe()
658 			       0, "fsl_spi", mpc8xxx_spi);  in fsl_spi_probe()
663 	reg_base = mpc8xxx_spi->reg_base;  in fsl_spi_probe()
673 	if (mpc8xxx_spi->max_bits_per_word < 8) {  in fsl_spi_probe()
675 		regval |= SPMODE_LEN(mpc8xxx_spi->max_bits_per_word - 1);  in fsl_spi_probe()
677 	if (mpc8xxx_spi->flags & SPI_QE_CPU_MODE)  in fsl_spi_probe()
687 		 mpc8xxx_spi->irq, mpc8xxx_spi_strmode(mpc8xxx_spi->flags));  in fsl_spi_probe()
692 	fsl_spi_cpm_free(mpc8xxx_spi);  in fsl_spi_probe()
857 	struct mpc8xxx_spi *mpc8xxx_spi = spi_master_get_devdata(master);  in of_fsl_spi_remove()  local
859 	fsl_spi_cpm_free(mpc8xxx_spi);  in of_fsl_spi_remove()
860 	if (mpc8xxx_spi->type == TYPE_FSL)  in of_fsl_spi_remove()
906 	struct mpc8xxx_spi *mpc8xxx_spi = spi_master_get_devdata(master);  in plat_mpc8xxx_spi_remove()  local
908 	fsl_spi_cpm_free(mpc8xxx_spi);  in plat_mpc8xxx_spi_remove()