Lines Matching refs:ubrlcr
218 unsigned int ubrlcr; in uart_clps711x_break_ctl() local
220 ubrlcr = readl(port->membase + UBRLCR_OFFSET); in uart_clps711x_break_ctl()
222 ubrlcr |= UBRLCR_BREAK; in uart_clps711x_break_ctl()
224 ubrlcr &= ~UBRLCR_BREAK; in uart_clps711x_break_ctl()
225 writel(ubrlcr, port->membase + UBRLCR_OFFSET); in uart_clps711x_break_ctl()
264 u32 ubrlcr; in uart_clps711x_set_termios() local
278 ubrlcr = UBRLCR_WRDLEN5; in uart_clps711x_set_termios()
281 ubrlcr = UBRLCR_WRDLEN6; in uart_clps711x_set_termios()
284 ubrlcr = UBRLCR_WRDLEN7; in uart_clps711x_set_termios()
288 ubrlcr = UBRLCR_WRDLEN8; in uart_clps711x_set_termios()
293 ubrlcr |= UBRLCR_XSTOP; in uart_clps711x_set_termios()
296 ubrlcr |= UBRLCR_PRTEN; in uart_clps711x_set_termios()
298 ubrlcr |= UBRLCR_EVENPRT; in uart_clps711x_set_termios()
302 ubrlcr |= UBRLCR_FIFOEN; in uart_clps711x_set_termios()
317 writel(ubrlcr | (quot - 1), port->membase + UBRLCR_OFFSET); in uart_clps711x_set_termios()
394 u32 ubrlcr; in uart_clps711x_console_setup() local
410 ubrlcr = readl(port->membase + UBRLCR_OFFSET); in uart_clps711x_console_setup()
412 if (ubrlcr & UBRLCR_PRTEN) { in uart_clps711x_console_setup()
413 if (ubrlcr & UBRLCR_EVENPRT) in uart_clps711x_console_setup()
419 if ((ubrlcr & UBRLCR_WRDLEN_MASK) == UBRLCR_WRDLEN7) in uart_clps711x_console_setup()
422 quot = ubrlcr & UBRLCR_BAUD_MASK; in uart_clps711x_console_setup()