Lines Matching refs:USART_CR1
36 #define USART_CR1 0x0c macro
274 stm32_clr_bits(port, USART_CR1, USART_CR1_TXEIE); in stm32_stop_tx()
285 stm32_set_bits(port, USART_CR1, USART_CR1_TXEIE | USART_CR1_TE); in stm32_start_tx()
294 stm32_clr_bits(port, USART_CR1, USART_CR1_RXNEIE); in stm32_throttle()
304 stm32_set_bits(port, USART_CR1, USART_CR1_RXNEIE); in stm32_unthrottle()
311 stm32_clr_bits(port, USART_CR1, USART_CR1_RXNEIE); in stm32_stop_rx()
330 stm32_set_bits(port, USART_CR1, val); in stm32_startup()
340 stm32_set_bits(port, USART_CR1, val); in stm32_shutdown()
363 writel_relaxed(0, port->membase + USART_CR1); in stm32_set_termios()
397 stm32_set_bits(port, USART_CR1, USART_CR1_OVER8); in stm32_set_termios()
400 stm32_clr_bits(port, USART_CR1, USART_CR1_OVER8); in stm32_set_termios()
435 writel_relaxed(cr1, port->membase + USART_CR1); in stm32_set_termios()
480 stm32_clr_bits(port, USART_CR1, USART_CR1_UE); in stm32_pm()
633 old_cr1 = readl_relaxed(port->membase + USART_CR1); in stm32_console_write()
635 writel_relaxed(new_cr1, port->membase + USART_CR1); in stm32_console_write()
640 writel_relaxed(old_cr1, port->membase + USART_CR1); in stm32_console_write()