451 		if (ep->num != UDC_EP0OUT_IX)  in udc_ep_enable()
973 				|| ep->num == UDC_EP0OUT_IX  in prep_dma()
1122 	if (!ep->ep.desc && (ep->num != 0 && ep->num != UDC_EP0OUT_IX))  in udc_queue()
1263 			if (ep->num != UDC_EP0OUT_IX)  in udc_queue()
1314 				&& ep->num != UDC_EP0OUT_IX)))  in udc_dequeue()
1373 	if (!ep->ep.desc && (ep->num != 0 && ep->num != UDC_EP0OUT_IX))  in udc_set_halt()
1628 			if (tmp != UDC_EP0IN_IX && tmp != UDC_EP0OUT_IX  in udc_setup_endpoints()
1643 		usb_ep_set_maxpacket_limit(&dev->ep[UDC_EP0OUT_IX].ep,  in udc_setup_endpoints()
1648 		usb_ep_set_maxpacket_limit(&dev->ep[UDC_EP0OUT_IX].ep,  in udc_setup_endpoints()
1896 	dev->ep[UDC_EP0OUT_IX].in = 0;  in activate_control_endpoints()
1919 	tmp = readl(&dev->ep[UDC_EP0OUT_IX].regs->bufout_maxpkt);  in activate_control_endpoints()
1926 	writel(tmp, &dev->ep[UDC_EP0OUT_IX].regs->bufout_maxpkt);  in activate_control_endpoints()
1939 		dev->ep[UDC_EP0OUT_IX].td->status |=  in activate_control_endpoints()
1942 		writel(dev->ep[UDC_EP0OUT_IX].td_stp_dma,  in activate_control_endpoints()
1943 			&dev->ep[UDC_EP0OUT_IX].regs->subptr);  in activate_control_endpoints()
1944 		writel(dev->ep[UDC_EP0OUT_IX].td_phys,  in activate_control_endpoints()
1945 			&dev->ep[UDC_EP0OUT_IX].regs->desptr);  in activate_control_endpoints()
1974 	tmp = readl(&dev->ep[UDC_EP0OUT_IX].regs->ctl);  in activate_control_endpoints()
1976 	writel(tmp, &dev->ep[UDC_EP0OUT_IX].regs->ctl);  in activate_control_endpoints()
1977 	dev->ep[UDC_EP0OUT_IX].naking = 0;  in activate_control_endpoints()
1978 	UDC_QUEUE_CNAK(&dev->ep[UDC_EP0OUT_IX], UDC_EP0OUT_IX);  in activate_control_endpoints()
2006 	dev->ep[UDC_EP0OUT_IX].ep.driver_data =  in amd5536_udc_start()
2081 	if (cnak_pending & (1 << UDC_EP0OUT_IX)) {  in udc_process_cnak_queue()
2082 		DBG(dev, "CNAK pending for ep%d\n", UDC_EP0OUT_IX);  in udc_process_cnak_queue()
2084 		reg = readl(&dev->ep[UDC_EP0OUT_IX].regs->ctl);  in udc_process_cnak_queue()
2086 		writel(reg, &dev->ep[UDC_EP0OUT_IX].regs->ctl);  in udc_process_cnak_queue()
2087 		dev->ep[UDC_EP0OUT_IX].naking = 0;  in udc_process_cnak_queue()
2088 		UDC_QUEUE_CNAK(&dev->ep[UDC_EP0OUT_IX],  in udc_process_cnak_queue()
2089 				dev->ep[UDC_EP0OUT_IX].num);  in udc_process_cnak_queue()
2304 				if (ep->num != UDC_EP0OUT_IX)  in udc_data_out_isr()
2506 	ep = &dev->ep[UDC_EP0OUT_IX];  in udc_control_out_isr()
2511 	tmp = readl(&dev->ep[UDC_EP0OUT_IX].regs->sts);  in udc_control_out_isr()
2516 			&dev->ep[UDC_EP0OUT_IX].regs->sts);  in udc_control_out_isr()
2543 				&dev->ep[UDC_EP0OUT_IX].regs->sts);  in udc_control_out_isr()
2546 				dev->ep[UDC_EP0OUT_IX].td_stp->data12;  in udc_control_out_isr()
2548 				dev->ep[UDC_EP0OUT_IX].td_stp->data34;  in udc_control_out_isr()
2550 			dev->ep[UDC_EP0OUT_IX].td_stp->status =  in udc_control_out_isr()
2564 			dev->gadget.ep0 = &dev->ep[UDC_EP0OUT_IX].ep;  in udc_control_out_isr()
2572 					&dev->ep[UDC_EP0OUT_IX].regs->desptr);  in udc_control_out_isr()
2577 			dev->ep[UDC_EP0OUT_IX].naking = 1;  in udc_control_out_isr()
2636 			tmp = readl(&dev->ep[UDC_EP0OUT_IX].regs->ctl);  in udc_control_out_isr()
2638 			writel(tmp, &dev->ep[UDC_EP0OUT_IX].regs->ctl);  in udc_control_out_isr()
2639 			dev->ep[UDC_EP0OUT_IX].naking = 0;  in udc_control_out_isr()
2640 			UDC_QUEUE_CNAK(&dev->ep[UDC_EP0OUT_IX], UDC_EP0OUT_IX);  in udc_control_out_isr()
2646 				&dev->ep[UDC_EP0OUT_IX].regs->sts);  in udc_control_out_isr()
2652 		writel(UDC_EPSTS_OUT_CLEAR, &dev->ep[UDC_EP0OUT_IX].regs->sts);  in udc_control_out_isr()
2657 			if (list_empty(&dev->ep[UDC_EP0OUT_IX].queue)) {  in udc_control_out_isr()
2661 				dev->ep[UDC_EP0OUT_IX].td->status =  in udc_control_out_isr()
2663 					dev->ep[UDC_EP0OUT_IX].td->status,  in udc_control_out_isr()
2672 				ret_val |= udc_data_out_isr(dev, UDC_EP0OUT_IX);  in udc_control_out_isr()
2674 				writel(dev->ep[UDC_EP0OUT_IX].td_phys,  in udc_control_out_isr()
2675 					&dev->ep[UDC_EP0OUT_IX].regs->desptr);  in udc_control_out_isr()
2682 			count = readl(&dev->ep[UDC_EP0OUT_IX].regs->sts);  in udc_control_out_isr()
2689 				ret_val |= udc_data_out_isr(dev, UDC_EP0OUT_IX);  in udc_control_out_isr()
2692 				readl(&dev->ep[UDC_EP0OUT_IX].regs->confirm);  in udc_control_out_isr()
3121 	dma_pool_free(dev->stp_requests, dev->ep[UDC_EP0OUT_IX].td,  in free_dma_pools()
3122 		      dev->ep[UDC_EP0OUT_IX].td_phys);  in free_dma_pools()
3123 	dma_pool_free(dev->stp_requests, dev->ep[UDC_EP0OUT_IX].td_stp,  in free_dma_pools()
3124 		      dev->ep[UDC_EP0OUT_IX].td_stp_dma);  in free_dma_pools()
3191 				&dev->ep[UDC_EP0OUT_IX].td_stp_dma);  in init_dma_pools()
3196 	dev->ep[UDC_EP0OUT_IX].td_stp = td_stp;  in init_dma_pools()
3200 				&dev->ep[UDC_EP0OUT_IX].td_phys);  in init_dma_pools()
3205 	dev->ep[UDC_EP0OUT_IX].td = td_data;  in init_dma_pools()
3209 	dma_pool_free(dev->stp_requests, dev->ep[UDC_EP0OUT_IX].td_stp,  in init_dma_pools()
3210 		      dev->ep[UDC_EP0OUT_IX].td_stp_dma);  in init_dma_pools()