Lines Matching refs:pll
562 rinfo->pll.ref_clk = (*val) / 10; in radeon_read_xtal_OF()
566 rinfo->pll.sclk = (*val) / 10; in radeon_read_xtal_OF()
570 rinfo->pll.mclk = (*val) / 10; in radeon_read_xtal_OF()
706 rinfo->pll.ref_clk = xtal; in radeon_probe_pll_params()
707 rinfo->pll.ref_div = ref_div; in radeon_probe_pll_params()
708 rinfo->pll.sclk = sclk; in radeon_probe_pll_params()
709 rinfo->pll.mclk = mclk; in radeon_probe_pll_params()
727 rinfo->pll.ppll_max = 35000; in radeon_get_pllinfo()
728 rinfo->pll.ppll_min = 12000; in radeon_get_pllinfo()
729 rinfo->pll.mclk = 23000; in radeon_get_pllinfo()
730 rinfo->pll.sclk = 23000; in radeon_get_pllinfo()
731 rinfo->pll.ref_clk = 2700; in radeon_get_pllinfo()
738 rinfo->pll.ppll_max = 35000; in radeon_get_pllinfo()
739 rinfo->pll.ppll_min = 12000; in radeon_get_pllinfo()
740 rinfo->pll.mclk = 27500; in radeon_get_pllinfo()
741 rinfo->pll.sclk = 27500; in radeon_get_pllinfo()
742 rinfo->pll.ref_clk = 2700; in radeon_get_pllinfo()
748 rinfo->pll.ppll_max = 35000; in radeon_get_pllinfo()
749 rinfo->pll.ppll_min = 12000; in radeon_get_pllinfo()
750 rinfo->pll.mclk = 25000; in radeon_get_pllinfo()
751 rinfo->pll.sclk = 25000; in radeon_get_pllinfo()
752 rinfo->pll.ref_clk = 2700; in radeon_get_pllinfo()
758 rinfo->pll.ppll_max = 40000; in radeon_get_pllinfo()
759 rinfo->pll.ppll_min = 20000; in radeon_get_pllinfo()
760 rinfo->pll.mclk = 27000; in radeon_get_pllinfo()
761 rinfo->pll.sclk = 27000; in radeon_get_pllinfo()
762 rinfo->pll.ref_clk = 2700; in radeon_get_pllinfo()
769 rinfo->pll.ppll_max = 35000; in radeon_get_pllinfo()
770 rinfo->pll.ppll_min = 12000; in radeon_get_pllinfo()
771 rinfo->pll.mclk = 16600; in radeon_get_pllinfo()
772 rinfo->pll.sclk = 16600; in radeon_get_pllinfo()
773 rinfo->pll.ref_clk = 2700; in radeon_get_pllinfo()
776 rinfo->pll.ref_div = INPLL(PPLL_REF_DIV) & PPLL_REF_DIV_MASK; in radeon_get_pllinfo()
796 rinfo->pll.sclk = BIOS_IN16(pll_info_block + 0x08); in radeon_get_pllinfo()
797 rinfo->pll.mclk = BIOS_IN16(pll_info_block + 0x0a); in radeon_get_pllinfo()
798 rinfo->pll.ref_clk = BIOS_IN16(pll_info_block + 0x0e); in radeon_get_pllinfo()
799 rinfo->pll.ref_div = BIOS_IN16(pll_info_block + 0x10); in radeon_get_pllinfo()
800 rinfo->pll.ppll_min = BIOS_IN32(pll_info_block + 0x12); in radeon_get_pllinfo()
801 rinfo->pll.ppll_max = BIOS_IN32(pll_info_block + 0x16); in radeon_get_pllinfo()
827 if (rinfo->pll.mclk == 0) in radeon_get_pllinfo()
828 rinfo->pll.mclk = 20000; in radeon_get_pllinfo()
829 if (rinfo->pll.sclk == 0) in radeon_get_pllinfo()
830 rinfo->pll.sclk = 20000; in radeon_get_pllinfo()
833 rinfo->pll.ref_clk / 100, rinfo->pll.ref_clk % 100, in radeon_get_pllinfo()
834 rinfo->pll.ref_div, in radeon_get_pllinfo()
835 rinfo->pll.mclk / 100, rinfo->pll.mclk % 100, in radeon_get_pllinfo()
836 rinfo->pll.sclk / 100, rinfo->pll.sclk % 100); in radeon_get_pllinfo()
837 printk("radeonfb: PLL min %d max %d\n", rinfo->pll.ppll_min, rinfo->pll.ppll_max); in radeon_get_pllinfo()
1603 if (freq > rinfo->pll.ppll_max) in radeon_calc_pll_regs()
1604 freq = rinfo->pll.ppll_max; in radeon_calc_pll_regs()
1605 if (freq*12 < rinfo->pll.ppll_min) in radeon_calc_pll_regs()
1606 freq = rinfo->pll.ppll_min / 12; in radeon_calc_pll_regs()
1608 freq, rinfo->pll.ppll_min, rinfo->pll.ppll_max); in radeon_calc_pll_regs()
1617 if (pll_output_freq >= rinfo->pll.ppll_min && in radeon_calc_pll_regs()
1618 pll_output_freq <= rinfo->pll.ppll_max) in radeon_calc_pll_regs()
1629 rinfo->pll.ref_div, rinfo->pll.ref_clk, in radeon_calc_pll_regs()
1639 rinfo->pll.ref_div, rinfo->pll.ref_clk, in radeon_calc_pll_regs()
1642 fb_div = round_div(rinfo->pll.ref_div*pll_output_freq, in radeon_calc_pll_regs()
1643 rinfo->pll.ref_clk); in radeon_calc_pll_regs()
1644 regs->ppll_ref_div = rinfo->pll.ref_div; in radeon_calc_pll_regs()