231 		state->crtc[i] = NVReadCrtc(par, i);  in nvidia_save_vga()
265 	NVWriteCrtc(par, 0x11, state->crtc[0x11] & ~0x80);  in nvidia_write_regs()
274 			printk("CRTC[%02x] = %08x\n", i, state->crtc[i]);  in nvidia_write_regs()
276 			NVWriteCrtc(par, i, state->crtc[i]);  in nvidia_write_regs()
335 	state->crtc[0x0] = Set8Bits(h_total);  in nvidia_calc_regs()
336 	state->crtc[0x1] = Set8Bits(h_display);  in nvidia_calc_regs()
337 	state->crtc[0x2] = Set8Bits(h_blank_s);  in nvidia_calc_regs()
338 	state->crtc[0x3] = SetBitField(h_blank_e, 4: 0, 4:0)  in nvidia_calc_regs()
340 	state->crtc[0x4] = Set8Bits(h_start);  in nvidia_calc_regs()
341 	state->crtc[0x5] = SetBitField(h_blank_e, 5: 5, 7:7)  in nvidia_calc_regs()
343 	state->crtc[0x6] = SetBitField(v_total, 7: 0, 7:0);  in nvidia_calc_regs()
344 	state->crtc[0x7] = SetBitField(v_total, 8: 8, 0:0)  in nvidia_calc_regs()
352 	state->crtc[0x9] = SetBitField(v_blank_s, 9: 9, 5:5)  in nvidia_calc_regs()
355 	state->crtc[0x10] = Set8Bits(v_start);  in nvidia_calc_regs()
356 	state->crtc[0x11] = SetBitField(v_end, 3: 0, 3:0) | SetBit(5);  in nvidia_calc_regs()
357 	state->crtc[0x12] = Set8Bits(v_display);  in nvidia_calc_regs()
358 	state->crtc[0x13] = ((info->var.xres_virtual / 8) *  in nvidia_calc_regs()
360 	state->crtc[0x15] = Set8Bits(v_blank_s);  in nvidia_calc_regs()
361 	state->crtc[0x16] = Set8Bits(v_blank_e);  in nvidia_calc_regs()
508 	memset(state->crtc, 0x00, NUM_CRT_REGS);  in nvidia_init_vga()
509 	state->crtc[0x0a] = 0x20;  in nvidia_init_vga()
510 	state->crtc[0x17] = 0xe3;  in nvidia_init_vga()
511 	state->crtc[0x18] = 0xff;  in nvidia_init_vga()
512 	state->crtc[0x28] = 0x40;  in nvidia_init_vga()