Lines Matching refs:dsi_write_reg

125 	dsi_write_reg(dsidev, idx, FLD_MOD(dsi_read_reg(dsidev, idx), val, start, end))
442 static inline void dsi_write_reg(struct platform_device *dsidev, in dsi_write_reg() function
819 dsi_write_reg(dsidev, DSI_IRQSTATUS, irqstatus & ~DSI_IRQ_CHANNEL_MASK); in omap_dsi_irq_handler()
831 dsi_write_reg(dsidev, DSI_VC_IRQSTATUS(i), vcstatus[i]); in omap_dsi_irq_handler()
839 dsi_write_reg(dsidev, DSI_COMPLEXIO_IRQ_STATUS, ciostatus); in omap_dsi_irq_handler()
892 dsi_write_reg(dsidev, status_reg, (mask ^ old_mask) & mask); in _omap_dsi_configure_irqs()
893 dsi_write_reg(dsidev, enable_reg, mask); in _omap_dsi_configure_irqs()
1862 dsi_write_reg(dsidev, DSI_COMPLEXIO_CFG1, r); in dsi_set_lane_config()
1941 dsi_write_reg(dsidev, DSI_DSIPHY_CFG0, r); in dsi_cio_timings()
1954 dsi_write_reg(dsidev, DSI_DSIPHY_CFG1, r); in dsi_cio_timings()
1958 dsi_write_reg(dsidev, DSI_DSIPHY_CFG2, r); in dsi_cio_timings()
2109 dsi_write_reg(dsidev, DSI_TIMING1, l); in dsi_cio_init()
2238 dsi_write_reg(dsidev, DSI_TX_FIFO_VC_SIZE, r); in dsi_config_tx_fifo()
2271 dsi_write_reg(dsidev, DSI_RX_FIFO_VC_SIZE, r); in dsi_config_rx_fifo()
2280 dsi_write_reg(dsidev, DSI_TIMING1, r); in dsi_force_tx_stop_mode_io()
2459 dsi_write_reg(dsidev, DSI_VC_CTRL(channel), r); in dsi_vc_initial_config()
2686 dsi_write_reg(dsidev, DSI_VC_LONG_PACKET_HEADER(channel), val); in dsi_vc_write_long_header()
2699 dsi_write_reg(dsidev, DSI_VC_LONG_PACKET_PAYLOAD(channel), val); in dsi_vc_write_long_payload()
2791 dsi_write_reg(dsidev, DSI_VC_SHORT_PACKET_HEADER(channel), r); in dsi_vc_send_short()
3237 dsi_write_reg(dsidev, DSI_TIMING2, r); in dsi_set_lp_rx_timeout()
3264 dsi_write_reg(dsidev, DSI_TIMING1, r); in dsi_set_ta_timeout()
3291 dsi_write_reg(dsidev, DSI_TIMING1, r); in dsi_set_stop_state_counter()
3318 dsi_write_reg(dsidev, DSI_TIMING2, r); in dsi_set_hs_tx_timeout()
3372 dsi_write_reg(dsidev, DSI_CTRL, r); in dsi_config_vp_sync_events()
3393 dsi_write_reg(dsidev, DSI_CTRL, r); in dsi_config_blanking_modes()
3561 dsi_write_reg(dsidev, DSI_VM_TIMING4, r); in dsi_config_cmd_mode_interleaving()
3567 dsi_write_reg(dsidev, DSI_VM_TIMING5, r); in dsi_config_cmd_mode_interleaving()
3572 dsi_write_reg(dsidev, DSI_VM_TIMING6, r); in dsi_config_cmd_mode_interleaving()
3627 dsi_write_reg(dsidev, DSI_CTRL, r); in dsi_proto_config()
3690 dsi_write_reg(dsidev, DSI_CLK_TIMING, r); in dsi_proto_timings()
3704 dsi_write_reg(dsidev, DSI_VM_TIMING7, r); in dsi_proto_timings()
3742 dsi_write_reg(dsidev, DSI_VM_TIMING1, r); in dsi_proto_timings()
3749 dsi_write_reg(dsidev, DSI_VM_TIMING2, r); in dsi_proto_timings()
3754 dsi_write_reg(dsidev, DSI_VM_TIMING3, r); in dsi_proto_timings()
3958 dsi_write_reg(dsidev, DSI_VC_TE(channel), l); in dsi_update_screen_dispc()
3967 dsi_write_reg(dsidev, DSI_VC_TE(channel), l); in dsi_update_screen_dispc()