Lines Matching refs:R4
49 #define R4 BPF_REG_4 macro
1130 BPF_ALU64_IMM(BPF_MOV, R4, 4),
1140 BPF_ALU64_IMM(BPF_ADD, R4, 20),
1150 BPF_ALU64_IMM(BPF_SUB, R4, 10),
1160 BPF_ALU64_REG(BPF_ADD, R0, R4),
1172 BPF_ALU64_REG(BPF_ADD, R1, R4),
1184 BPF_ALU64_REG(BPF_ADD, R2, R4),
1196 BPF_ALU64_REG(BPF_ADD, R3, R4),
1204 BPF_ALU64_REG(BPF_ADD, R4, R0),
1205 BPF_ALU64_REG(BPF_ADD, R4, R1),
1206 BPF_ALU64_REG(BPF_ADD, R4, R2),
1207 BPF_ALU64_REG(BPF_ADD, R4, R3),
1208 BPF_ALU64_REG(BPF_ADD, R4, R4),
1209 BPF_ALU64_REG(BPF_ADD, R4, R5),
1210 BPF_ALU64_REG(BPF_ADD, R4, R6),
1211 BPF_ALU64_REG(BPF_ADD, R4, R7),
1212 BPF_ALU64_REG(BPF_ADD, R4, R8),
1213 BPF_ALU64_REG(BPF_ADD, R4, R9), /* R4 == 12177 */
1214 BPF_JMP_IMM(BPF_JEQ, R4, 12177, 1),
1220 BPF_ALU64_REG(BPF_ADD, R5, R4),
1232 BPF_ALU64_REG(BPF_ADD, R6, R4),
1244 BPF_ALU64_REG(BPF_ADD, R7, R4),
1256 BPF_ALU64_REG(BPF_ADD, R8, R4),
1268 BPF_ALU64_REG(BPF_ADD, R9, R4),
1288 BPF_ALU32_IMM(BPF_MOV, R4, 4),
1297 BPF_ALU64_IMM(BPF_ADD, R4, 10),
1306 BPF_ALU32_REG(BPF_ADD, R0, R4),
1318 BPF_ALU32_REG(BPF_ADD, R1, R4),
1330 BPF_ALU32_REG(BPF_ADD, R2, R4),
1342 BPF_ALU32_REG(BPF_ADD, R3, R4),
1350 BPF_ALU32_REG(BPF_ADD, R4, R0),
1351 BPF_ALU32_REG(BPF_ADD, R4, R1),
1352 BPF_ALU32_REG(BPF_ADD, R4, R2),
1353 BPF_ALU32_REG(BPF_ADD, R4, R3),
1354 BPF_ALU32_REG(BPF_ADD, R4, R4),
1355 BPF_ALU32_REG(BPF_ADD, R4, R5),
1356 BPF_ALU32_REG(BPF_ADD, R4, R6),
1357 BPF_ALU32_REG(BPF_ADD, R4, R7),
1358 BPF_ALU32_REG(BPF_ADD, R4, R8),
1359 BPF_ALU32_REG(BPF_ADD, R4, R9), /* R4 == 12177 */
1360 BPF_JMP_IMM(BPF_JEQ, R4, 12177, 1),
1366 BPF_ALU32_REG(BPF_ADD, R5, R4),
1378 BPF_ALU32_REG(BPF_ADD, R6, R4),
1390 BPF_ALU32_REG(BPF_ADD, R7, R4),
1402 BPF_ALU32_REG(BPF_ADD, R8, R4),
1414 BPF_ALU32_REG(BPF_ADD, R9, R4),
1434 BPF_ALU64_IMM(BPF_MOV, R4, 4),
1444 BPF_ALU64_REG(BPF_SUB, R0, R4),
1456 BPF_ALU64_REG(BPF_SUB, R1, R4),
1466 BPF_ALU64_REG(BPF_SUB, R2, R4),
1476 BPF_ALU64_REG(BPF_SUB, R3, R4),
1483 BPF_ALU64_REG(BPF_SUB, R4, R0),
1484 BPF_ALU64_REG(BPF_SUB, R4, R1),
1485 BPF_ALU64_REG(BPF_SUB, R4, R2),
1486 BPF_ALU64_REG(BPF_SUB, R4, R3),
1487 BPF_ALU64_REG(BPF_SUB, R4, R5),
1488 BPF_ALU64_REG(BPF_SUB, R4, R6),
1489 BPF_ALU64_REG(BPF_SUB, R4, R7),
1490 BPF_ALU64_REG(BPF_SUB, R4, R8),
1491 BPF_ALU64_REG(BPF_SUB, R4, R9),
1492 BPF_ALU64_IMM(BPF_SUB, R4, 10),
1497 BPF_ALU64_REG(BPF_SUB, R5, R4),
1507 BPF_ALU64_REG(BPF_SUB, R6, R4),
1517 BPF_ALU64_REG(BPF_SUB, R7, R4),
1527 BPF_ALU64_REG(BPF_SUB, R8, R4),
1537 BPF_ALU64_REG(BPF_SUB, R9, R4),
1548 BPF_ALU64_REG(BPF_SUB, R0, R4),
1580 BPF_ALU64_REG(BPF_XOR, R4, R4),
1583 BPF_JMP_REG(BPF_JEQ, R3, R4, 1),
1585 BPF_ALU64_REG(BPF_SUB, R4, R4),
1589 BPF_JMP_REG(BPF_JEQ, R5, R4, 1),
1633 BPF_ALU64_IMM(BPF_MOV, R4, 4),
1643 BPF_ALU64_REG(BPF_MUL, R0, R4),
1655 BPF_ALU64_REG(BPF_MUL, R1, R4),
1673 BPF_ALU64_REG(BPF_MUL, R2, R4),
1718 BPF_MOV32_IMM(R4, -1234),
1719 BPF_JMP_REG(BPF_JEQ, R0, R4, 1),
1721 BPF_ALU64_IMM(BPF_AND, R4, 63),
1722 BPF_ALU64_REG(BPF_LSH, R0, R4), /* R0 <= 46 */
1728 BPF_ALU64_REG(BPF_LSH, R4, R2), /* R4 = 46 << 1 */
1729 BPF_JMP_IMM(BPF_JEQ, R4, 92, 1),
1731 BPF_MOV64_IMM(R4, 4),
1732 BPF_ALU64_REG(BPF_LSH, R4, R4), /* R4 = 4 << 4 */
1733 BPF_JMP_IMM(BPF_JEQ, R4, 64, 1),
1735 BPF_MOV64_IMM(R4, 5),
1736 BPF_ALU32_REG(BPF_LSH, R4, R4), /* R4 = 5 << 5 */
1737 BPF_JMP_IMM(BPF_JEQ, R4, 160, 1),
2827 BPF_LD_IMM64(R4, 0xffffffffffffffffLL),
2829 BPF_ALU64_REG(BPF_DIV, R2, R4),