Lines Matching refs:RT5677_PWR_DIG1
145 {RT5677_PWR_DIG1 , 0x0000},
410 case RT5677_PWR_DIG1: in rt5677_readable_register()
2716 SND_SOC_DAPM_SUPPLY("ADC 1 power", RT5677_PWR_DIG1,
2718 SND_SOC_DAPM_SUPPLY("ADC 2 power", RT5677_PWR_DIG1,
2720 SND_SOC_DAPM_SUPPLY("ADC1 clock", RT5677_PWR_DIG1,
2722 SND_SOC_DAPM_SUPPLY("ADC2 clock", RT5677_PWR_DIG1,
2854 SND_SOC_DAPM_SUPPLY("I2S1", RT5677_PWR_DIG1,
2873 SND_SOC_DAPM_SUPPLY("I2S2", RT5677_PWR_DIG1,
2892 SND_SOC_DAPM_SUPPLY("I2S3", RT5677_PWR_DIG1,
2901 SND_SOC_DAPM_SUPPLY("I2S4", RT5677_PWR_DIG1,
2910 SND_SOC_DAPM_SUPPLY("SLB", RT5677_PWR_DIG1,
3133 SND_SOC_DAPM_DAC("DAC 1", NULL, RT5677_PWR_DIG1,
3135 SND_SOC_DAPM_DAC("DAC 2", NULL, RT5677_PWR_DIG1,
3137 SND_SOC_DAPM_DAC("DAC 3", NULL, RT5677_PWR_DIG1,
4506 regmap_write(rt5677->regmap, RT5677_PWR_DIG1, 0x0000); in rt5677_set_bias_level()