Lines Matching refs:wm2000_write
84 static int wm2000_write(struct i2c_client *i2c, unsigned int reg, in wm2000_write() function
108 wm2000_write(i2c, WM2000_REG_SYS_CTL2, WM2000_ANC_ENG_CLR); in wm2000_reset()
109 wm2000_write(i2c, WM2000_REG_SYS_CTL2, WM2000_RAM_CLR); in wm2000_reset()
110 wm2000_write(i2c, WM2000_REG_ID1, 0); in wm2000_reset()
154 wm2000_write(i2c, WM2000_REG_SYS_CTL2, in wm2000_power_up()
158 wm2000_write(i2c, WM2000_REG_SYS_CTL2, in wm2000_power_up()
162 wm2000_write(i2c, WM2000_REG_SYS_CTL2, WM2000_ANC_ENG_CLR); in wm2000_power_up()
163 wm2000_write(i2c, WM2000_REG_SYS_CTL2, WM2000_ANC_ENG_SET); in wm2000_power_up()
180 wm2000_write(i2c, WM2000_REG_SYS_CTL2, WM2000_RAM_SET); in wm2000_power_up()
204 wm2000_write(i2c, WM2000_REG_ANA_VMID_PU_TIME, 248 / 4); in wm2000_power_up()
206 wm2000_write(i2c, WM2000_REG_SYS_MODE_CNTRL, in wm2000_power_up()
211 wm2000_write(i2c, WM2000_REG_SYS_MODE_CNTRL, in wm2000_power_up()
221 wm2000_write(i2c, WM2000_REG_SPEECH_CLARITY, ret); in wm2000_power_up()
223 wm2000_write(i2c, WM2000_REG_SYS_START0, 0x33); in wm2000_power_up()
224 wm2000_write(i2c, WM2000_REG_SYS_START1, 0x02); in wm2000_power_up()
226 wm2000_write(i2c, WM2000_REG_SYS_CTL2, WM2000_ANC_INT_N_CLR); in wm2000_power_up()
248 wm2000_write(i2c, WM2000_REG_ANA_VMID_PD_TIME, 248 / 4); in wm2000_power_down()
249 wm2000_write(i2c, WM2000_REG_SYS_MODE_CNTRL, in wm2000_power_down()
253 wm2000_write(i2c, WM2000_REG_SYS_MODE_CNTRL, in wm2000_power_down()
285 wm2000_write(i2c, WM2000_REG_SYS_MODE_CNTRL, in wm2000_enter_bypass()
290 wm2000_write(i2c, WM2000_REG_SYS_MODE_CNTRL, in wm2000_enter_bypass()
307 wm2000_write(i2c, WM2000_REG_SYS_CTL1, WM2000_SYS_STBY); in wm2000_enter_bypass()
308 wm2000_write(i2c, WM2000_REG_SYS_CTL2, WM2000_RAM_CLR); in wm2000_enter_bypass()
323 wm2000_write(i2c, WM2000_REG_SYS_CTL1, 0); in wm2000_exit_bypass()
326 wm2000_write(i2c, WM2000_REG_SYS_MODE_CNTRL, in wm2000_exit_bypass()
331 wm2000_write(i2c, WM2000_REG_SYS_MODE_CNTRL, in wm2000_exit_bypass()
336 wm2000_write(i2c, WM2000_REG_SYS_CTL2, WM2000_RAM_SET); in wm2000_exit_bypass()
337 wm2000_write(i2c, WM2000_REG_SYS_CTL2, WM2000_ANC_INT_N_CLR); in wm2000_exit_bypass()
359 wm2000_write(i2c, WM2000_REG_ANA_VMID_PD_TIME, 248 / 4); in wm2000_enter_standby()
361 wm2000_write(i2c, WM2000_REG_SYS_MODE_CNTRL, in wm2000_enter_standby()
366 wm2000_write(i2c, WM2000_REG_SYS_MODE_CNTRL, in wm2000_enter_standby()
384 wm2000_write(i2c, WM2000_REG_SYS_CTL1, WM2000_SYS_STBY); in wm2000_enter_standby()
385 wm2000_write(i2c, WM2000_REG_SYS_CTL2, WM2000_RAM_CLR); in wm2000_enter_standby()
402 wm2000_write(i2c, WM2000_REG_SYS_CTL1, 0); in wm2000_exit_standby()
405 wm2000_write(i2c, WM2000_REG_ANA_VMID_PU_TIME, 248 / 4); in wm2000_exit_standby()
407 wm2000_write(i2c, WM2000_REG_SYS_MODE_CNTRL, in wm2000_exit_standby()
412 wm2000_write(i2c, WM2000_REG_SYS_MODE_CNTRL, in wm2000_exit_standby()
417 wm2000_write(i2c, WM2000_REG_SYS_CTL2, WM2000_RAM_SET); in wm2000_exit_standby()
418 wm2000_write(i2c, WM2000_REG_SYS_CTL2, WM2000_ANC_INT_N_CLR); in wm2000_exit_standby()