Lines Matching refs:registers
144 writel(temp_reg, msp->registers + MSP_TCF); in set_prot_desc_tx()
172 writel(temp_reg, msp->registers + MSP_RCF); in set_prot_desc_rx()
209 temp_reg = readl(msp->registers + MSP_GCR) & ~TX_CLK_POL_RISING; in configure_protocol()
211 writel(temp_reg, msp->registers + MSP_GCR); in configure_protocol()
212 temp_reg = readl(msp->registers + MSP_GCR) & ~RX_CLK_POL_RISING; in configure_protocol()
214 writel(temp_reg, msp->registers + MSP_GCR); in configure_protocol()
228 reg_val_GCR = readl(msp->registers + MSP_GCR); in setup_bitclk()
229 writel(reg_val_GCR & ~SRG_ENABLE, msp->registers + MSP_GCR); in setup_bitclk()
261 writel(temp_reg, msp->registers + MSP_SRG); in setup_bitclk()
267 reg_val_GCR = readl(msp->registers + MSP_GCR); in setup_bitclk()
268 writel(reg_val_GCR | SRG_ENABLE, msp->registers + MSP_GCR); in setup_bitclk()
297 reg_val_MCR = readl(msp->registers + MSP_MCR); in configure_multichannel()
300 msp->registers + MSP_MCR); in configure_multichannel()
302 msp->registers + MSP_TCE0); in configure_multichannel()
304 msp->registers + MSP_TCE1); in configure_multichannel()
306 msp->registers + MSP_TCE2); in configure_multichannel()
308 msp->registers + MSP_TCE3); in configure_multichannel()
318 reg_val_MCR = readl(msp->registers + MSP_MCR); in configure_multichannel()
321 msp->registers + MSP_MCR); in configure_multichannel()
323 msp->registers + MSP_RCE0); in configure_multichannel()
325 msp->registers + MSP_RCE1); in configure_multichannel()
327 msp->registers + MSP_RCE2); in configure_multichannel()
329 msp->registers + MSP_RCE3); in configure_multichannel()
337 reg_val_MCR = readl(msp->registers + MSP_MCR); in configure_multichannel()
340 msp->registers + MSP_MCR); in configure_multichannel()
343 msp->registers + MSP_RCM); in configure_multichannel()
345 msp->registers + MSP_RCV); in configure_multichannel()
383 reg_val_DMACR = readl(msp->registers + MSP_DMACR); in enable_msp()
388 writel(reg_val_DMACR, msp->registers + MSP_DMACR); in enable_msp()
390 writel(config->iodelay, msp->registers + MSP_IODLY); in enable_msp()
393 reg_val_GCR = readl(msp->registers + MSP_GCR); in enable_msp()
394 writel(reg_val_GCR | FRAME_GEN_ENABLE, msp->registers + MSP_GCR); in enable_msp()
404 reg_val_GCR = readl(msp->registers + MSP_GCR); in flush_fifo_rx()
405 writel(reg_val_GCR | RX_ENABLE, msp->registers + MSP_GCR); in flush_fifo_rx()
407 reg_val_FLR = readl(msp->registers + MSP_FLR); in flush_fifo_rx()
409 reg_val_DR = readl(msp->registers + MSP_DR); in flush_fifo_rx()
410 reg_val_FLR = readl(msp->registers + MSP_FLR); in flush_fifo_rx()
413 writel(reg_val_GCR, msp->registers + MSP_GCR); in flush_fifo_rx()
421 reg_val_GCR = readl(msp->registers + MSP_GCR); in flush_fifo_tx()
422 writel(reg_val_GCR | TX_ENABLE, msp->registers + MSP_GCR); in flush_fifo_tx()
423 writel(MSP_ITCR_ITEN | MSP_ITCR_TESTFIFO, msp->registers + MSP_ITCR); in flush_fifo_tx()
425 reg_val_FLR = readl(msp->registers + MSP_FLR); in flush_fifo_tx()
427 reg_val_TSTDR = readl(msp->registers + MSP_TSTDR); in flush_fifo_tx()
428 reg_val_FLR = readl(msp->registers + MSP_FLR); in flush_fifo_tx()
430 writel(0x0, msp->registers + MSP_ITCR); in flush_fifo_tx()
431 writel(reg_val_GCR, msp->registers + MSP_GCR); in flush_fifo_tx()
482 old_reg = readl(msp->registers + MSP_GCR); in ux500_msp_i2s_open()
485 writel(new_reg, msp->registers + MSP_GCR); in ux500_msp_i2s_open()
508 reg_val_GCR = readl(msp->registers + MSP_GCR); in disable_msp_rx()
509 writel(reg_val_GCR & ~RX_ENABLE, msp->registers + MSP_GCR); in disable_msp_rx()
510 reg_val_DMACR = readl(msp->registers + MSP_DMACR); in disable_msp_rx()
511 writel(reg_val_DMACR & ~RX_DMA_ENABLE, msp->registers + MSP_DMACR); in disable_msp_rx()
512 reg_val_IMSC = readl(msp->registers + MSP_IMSC); in disable_msp_rx()
515 msp->registers + MSP_IMSC); in disable_msp_rx()
524 reg_val_GCR = readl(msp->registers + MSP_GCR); in disable_msp_tx()
525 writel(reg_val_GCR & ~TX_ENABLE, msp->registers + MSP_GCR); in disable_msp_tx()
526 reg_val_DMACR = readl(msp->registers + MSP_DMACR); in disable_msp_tx()
527 writel(reg_val_DMACR & ~TX_DMA_ENABLE, msp->registers + MSP_DMACR); in disable_msp_tx()
528 reg_val_IMSC = readl(msp->registers + MSP_IMSC); in disable_msp_tx()
531 msp->registers + MSP_IMSC); in disable_msp_tx()
542 reg_val_GCR = readl(msp->registers + MSP_GCR); in disable_msp()
546 reg_val_GCR = readl(msp->registers + MSP_GCR); in disable_msp()
548 msp->registers + MSP_GCR); in disable_msp()
554 writel((readl(msp->registers + MSP_GCR) & in disable_msp()
555 (~TX_ENABLE)), msp->registers + MSP_GCR); in disable_msp()
561 writel((readl(msp->registers + MSP_GCR) & in disable_msp()
563 msp->registers + MSP_GCR); in disable_msp()
593 reg_val_GCR = readl(msp->registers + MSP_GCR); in ux500_msp_i2s_trigger()
594 writel(reg_val_GCR | enable_bit, msp->registers + MSP_GCR); in ux500_msp_i2s_trigger()
623 writel((readl(msp->registers + MSP_GCR) & in ux500_msp_i2s_close()
625 msp->registers + MSP_GCR); in ux500_msp_i2s_close()
627 writel(0, msp->registers + MSP_GCR); in ux500_msp_i2s_close()
628 writel(0, msp->registers + MSP_TCF); in ux500_msp_i2s_close()
629 writel(0, msp->registers + MSP_RCF); in ux500_msp_i2s_close()
630 writel(0, msp->registers + MSP_DMACR); in ux500_msp_i2s_close()
631 writel(0, msp->registers + MSP_SRG); in ux500_msp_i2s_close()
632 writel(0, msp->registers + MSP_MCR); in ux500_msp_i2s_close()
633 writel(0, msp->registers + MSP_RCM); in ux500_msp_i2s_close()
634 writel(0, msp->registers + MSP_RCV); in ux500_msp_i2s_close()
635 writel(0, msp->registers + MSP_TCE0); in ux500_msp_i2s_close()
636 writel(0, msp->registers + MSP_TCE1); in ux500_msp_i2s_close()
637 writel(0, msp->registers + MSP_TCE2); in ux500_msp_i2s_close()
638 writel(0, msp->registers + MSP_TCE3); in ux500_msp_i2s_close()
639 writel(0, msp->registers + MSP_RCE0); in ux500_msp_i2s_close()
640 writel(0, msp->registers + MSP_RCE1); in ux500_msp_i2s_close()
641 writel(0, msp->registers + MSP_RCE2); in ux500_msp_i2s_close()
642 writel(0, msp->registers + MSP_RCE3); in ux500_msp_i2s_close()
717 msp->registers = devm_ioremap(&pdev->dev, res->start, in ux500_msp_i2s_init_msp()
719 if (msp->registers == NULL) { in ux500_msp_i2s_init_msp()