Searched refs:AR_CH0_BB_DPLL1 (Results 1 – 2 of 2) sorted by relevance
764 REG_RMW_FIELD(ah, AR_CH0_BB_DPLL1, in ath9k_hw_init_pll()766 REG_RMW_FIELD(ah, AR_CH0_BB_DPLL1, in ath9k_hw_init_pll()768 REG_RMW_FIELD(ah, AR_CH0_BB_DPLL1, in ath9k_hw_init_pll()
1233 #define AR_CH0_BB_DPLL1 0x16180 macro