Searched refs:CLK_B (Results 1 – 5 of 5) sorted by relevance
190 phyclk = <&pio2 3 ALT4 OUT NICLK 0 CLK_B>;370 txd2 = <&pio14 2 ALT2 OUT SE_NICLK_IO 0 CLK_B>;371 txd3 = <&pio14 3 ALT2 OUT SE_NICLK_IO 0 CLK_B>;378 mdc = <&pio15 5 ALT2 OUT NICLK 0 CLK_B>;396 mdc = <&pio15 5 ALT2 OUT NICLK 0 CLK_B>;401 txd2 = <&pio14 2 ALT2 OUT SE_NICLK_IO 3000 CLK_B>;402 txd3 = <&pio14 3 ALT2 OUT SE_NICLK_IO 3000 CLK_B>;403 txd4 = <&pio14 4 ALT2 OUT SE_NICLK_IO 3000 CLK_B>;404 txd5 = <&pio14 5 ALT2 OUT SE_NICLK_IO 3000 CLK_B>;405 txd6 = <&pio14 6 ALT2 OUT SE_NICLK_IO 3000 CLK_B>;[all …]
213 phyclk = <&pio2 3 ALT4 OUT NICLK 0 CLK_B>;440 txd2 = <&pio14 2 ALT2 OUT SE_NICLK_IO 0 CLK_B>;441 txd3 = <&pio14 3 ALT2 OUT SE_NICLK_IO 0 CLK_B>;448 mdc = <&pio15 5 ALT2 OUT NICLK 0 CLK_B>;457 phyclk = <&pio13 5 ALT2 OUT NICLK 0 CLK_B>;467 phyclk = <&pio13 5 ALT4 OUT NICLK 0 CLK_B>;471 txd2 = <&pio14 2 ALT2 OUT DE_IO 500 CLK_B>;472 txd3 = <&pio14 3 ALT2 OUT DE_IO 500 CLK_B>;476 mdc = <&pio15 5 ALT2 OUT NICLK 0 CLK_B>;493 mmcclk = <&pio13 4 ALT4 BIDIR_PU NICLK 0 CLK_B>;[all …]
24 #define CLK_B (1 << 18) macro
194 phyclk = <&pio2 3 ALT4 OUT NICLK 1750 CLK_B>;381 sd_clk = <&pio19 3 ALT5 BIDIR NICLK 0 CLK_B>;
143 CLK_B148 as non inverted clock retimed with CLK_B and delay of 0 pico seconds:155 mmcclk = <&PIO13 4 ALT4 BIDIR_PU NICLK 0 CLK_B>;