Searched refs:DMA18_IRQ_STATUS (Results 1 – 6 of 6) sorted by relevance
587 #define DMA18_IRQ_STATUS 0xFFC01EA8 /* DMA Channel 18 Interrupt/Status Register */ macro
976 #define bfin_read_DMA18_IRQ_STATUS() bfin_read16(DMA18_IRQ_STATUS)977 #define bfin_write_DMA18_IRQ_STATUS(val) bfin_write16(DMA18_IRQ_STATUS, val)
802 #define DMA18_IRQ_STATUS 0xffc01da8 /* DMA Channel 18 Interrupt/Status Register … macro
1355 #define bfin_read_DMA18_IRQ_STATUS() bfin_read16(DMA18_IRQ_STATUS)1356 #define bfin_write_DMA18_IRQ_STATUS(val) bfin_write16(DMA18_IRQ_STATUS, val)
1908 #define DMA18_IRQ_STATUS 0xFFC072B0 /* DMA18 Status Register */ macro
1013 #define bfin_read_DMA18_IRQ_STATUS() bfin_read32(DMA18_IRQ_STATUS)1014 #define bfin_write_DMA18_IRQ_STATUS(val) bfin_write32(DMA18_IRQ_STATUS, val)