Searched refs:DMC (Results 1 – 4 of 4) sorted by relevance
18 #define DMC 0x600000UL macro1977 #define RXDMA_CFIG1(IDX) (DMC + 0x00000UL + (IDX) * 0x200UL)1983 #define RXDMA_CFIG2(IDX) (DMC + 0x00008UL + (IDX) * 0x200UL)1989 #define RBR_CFIG_A(IDX) (DMC + 0x00010UL + (IDX) * 0x200UL)1995 #define RBR_CFIG_B(IDX) (DMC + 0x00018UL + (IDX) * 0x200UL)2025 #define RBR_KICK(IDX) (DMC + 0x00020UL + (IDX) * 0x200UL)2028 #define RBR_STAT(IDX) (DMC + 0x00028UL + (IDX) * 0x200UL)2031 #define RBR_HDH(IDX) (DMC + 0x00030UL + (IDX) * 0x200UL)2034 #define RBR_HDL(IDX) (DMC + 0x00038UL + (IDX) * 0x200UL)2037 #define RCRCFIG_A(IDX) (DMC + 0x00040UL + (IDX) * 0x200UL)[all …]
12 Controller (DMC) domain clock controller.
8 usages of each IP (DMC, CPU, RIGHTBUS, LEFTBUS, CAM interface, LCD, G3D, MFC).
761 - DMC TSC-10/25821 bool "DMC TSC-10/25 device support" if EXPERT