Searched refs:DP_TRAINING_PATTERN_1 (Results 1 – 8 of 8) sorted by relevance
576 case DP_TRAINING_PATTERN_1: in radeon_dp_set_tp()589 case DP_TRAINING_PATTERN_1: in radeon_dp_set_tp()676 radeon_dp_set_tp(dp_info, DP_TRAINING_PATTERN_1); in radeon_dp_link_train_cr()
235 # define DP_TRAINING_PATTERN_1 1 macro
550 case DP_TRAINING_PATTERN_1: in tegra_dpaux_train()
145 pattern = DP_TRAINING_PATTERN_1; in tegra_sor_dp_train_fast()
626 edp_host_train_set(ctrl, DP_TRAINING_PATTERN_1); in edp_start_link_train_1()631 DP_TRAINING_PATTERN_1 | DP_RECOVERED_CLOCK_OUT_EN); in edp_start_link_train_1()
2396 case DP_TRAINING_PATTERN_1: in _intel_dp_set_link_train()2415 case DP_TRAINING_PATTERN_1: in _intel_dp_set_link_train()2437 case DP_TRAINING_PATTERN_1: in _intel_dp_set_link_train()2462 DP_TRAINING_PATTERN_1); in intel_dp_enable_port()3570 DP_TRAINING_PATTERN_1 | in intel_dp_start_link_train()3604 DP_TRAINING_PATTERN_1 | in intel_dp_start_link_train()
1542 if (!cdv_intel_dp_set_link_train(encoder, reg, DP_TRAINING_PATTERN_1)) { in cdv_intel_dp_start_link_train()1548 cdv_intel_dplink_set_level(encoder, DP_TRAINING_PATTERN_1); in cdv_intel_dp_start_link_train()
338 DP_LINK_SCRAMBLING_DISABLE | DP_TRAINING_PATTERN_1); in exynos_dp_link_start()