Searched refs:EEH_STATE_MMIO_ACTIVE (Results 1 – 4 of 4) sorted by relevance
441 result |= EEH_STATE_MMIO_ACTIVE; in pseries_eeh_get_state()446 result |= EEH_STATE_MMIO_ACTIVE; in pseries_eeh_get_state()451 result &= ~EEH_STATE_MMIO_ACTIVE; in pseries_eeh_get_state()456 result &= ~EEH_STATE_MMIO_ACTIVE; in pseries_eeh_get_state()
597 result = (EEH_STATE_MMIO_ACTIVE | in pnv_eeh_get_phb_state()627 result = (EEH_STATE_MMIO_ACTIVE | in pnv_eeh_get_pe_state()657 result = (EEH_STATE_MMIO_ACTIVE | in pnv_eeh_get_pe_state()667 result = (EEH_STATE_MMIO_ACTIVE | in pnv_eeh_get_pe_state()698 !(result & EEH_STATE_MMIO_ACTIVE) && in pnv_eeh_get_pe_state()1266 int active_flags = (EEH_STATE_MMIO_ACTIVE | in pnv_eeh_get_pe()1304 int active_flags = (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE); in pnv_eeh_next_error()
398 (ret & (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE)) == in eeh_phb_check_failure()399 (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE)) { in eeh_phb_check_failure()436 int active_flags = (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE); in eeh_dev_check_failure()635 active_flag = EEH_STATE_MMIO_ACTIVE; in eeh_pci_enable()850 int flags = (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE); in eeh_reset_pe()1307 flags = (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE); in eeh_pe_change_owner()
185 #define EEH_STATE_MMIO_ACTIVE (1 << 3) /* Active MMIO */ macro