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Searched refs:HV_PTE (Results 1 – 23 of 23) sorted by relevance

/linux-4.1.27/arch/tile/include/hv/
Dhypervisor.h368 } HV_PTE; typedef
594 int hv_get_ipi_pte(HV_Coord tile, int pl, HV_PTE* pte);
772 int hv_install_context(HV_PhysAddr page_table, HV_PTE access, HV_ASID asid,
817 HV_PTE access;
1332 unsigned long long hv_physaddr_read64(HV_PhysAddr addr, HV_PTE access);
1342 void hv_physaddr_write64(HV_PhysAddr addr, HV_PTE access,
1790 HV_PTE pte; /**< Page table entry describing the caching and location
1973 #define hv_pte(val) ((HV_PTE) { val })
2316 hv_pte_get_##name(HV_PTE pte) \
2321 static __inline HV_PTE \
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Diorpc.h372 HV_PTE pte; /**< PTE describing memory homing. */
Ddrv_xgbe_intf.h36 HV_PTE pte;
/linux-4.1.27/arch/tile/gxio/
Diorpc_usb_host.c40 HV_PTE pte;
45 HV_PTE pte, unsigned int flags) in gxio_usb_host_register_client_memory()
61 HV_PTE base;
64 int gxio_usb_host_get_mmio_base(gxio_usb_host_context_t *context, HV_PTE *base) in gxio_usb_host_get_mmio_base()
Diorpc_uart.c40 HV_PTE base;
43 int gxio_uart_get_mmio_base(gxio_uart_context_t *context, HV_PTE *base) in gxio_uart_get_mmio_base()
Diorpc_globals.c53 HV_PTE base;
56 int __iorpc_get_mmio_base(int fd, HV_PTE *base) in __iorpc_get_mmio_base()
Diorpc_mpipe_info.c63 HV_PTE base;
67 HV_PTE *base) in gxio_mpipe_info_get_mmio_base()
Diorpc_mpipe.c331 HV_PTE pte;
336 unsigned int iotlb, HV_PTE pte, in gxio_mpipe_register_client_memory()
556 HV_PTE base;
559 int gxio_mpipe_get_mmio_base(gxio_mpipe_context_t *context, HV_PTE *base) in gxio_mpipe_get_mmio_base()
Diorpc_trio.c313 HV_PTE base;
316 int gxio_trio_get_mmio_base(gxio_trio_context_t *context, HV_PTE *base) in gxio_trio_get_mmio_base()
/linux-4.1.27/arch/tile/include/gxio/
Diorpc_usb_host.h38 HV_PTE pte, unsigned int flags);
41 HV_PTE *base);
Diorpc_mpipe.h112 unsigned int iotlb, HV_PTE pte,
139 int gxio_mpipe_get_mmio_base(gxio_mpipe_context_t *context, HV_PTE *base);
Diorpc_uart.h35 int gxio_uart_get_mmio_base(gxio_uart_context_t *context, HV_PTE *base);
Diorpc_globals.h34 int __iorpc_get_mmio_base(int fd, HV_PTE *base);
Diorpc_mpipe_info.h45 HV_PTE *base);
Diorpc_trio.h99 int gxio_trio_get_mmio_base(gxio_trio_context_t *context, HV_PTE *base);
Dmpipe.h598 unsigned int iotlb, HV_PTE pte,
/linux-4.1.27/arch/tile/include/asm/
Dpage.h83 typedef HV_PTE pte_t;
84 typedef HV_PTE pgd_t;
85 typedef HV_PTE pgprot_t;
119 typedef HV_PTE pmd_t;
/linux-4.1.27/arch/tile/mm/
Dmigrate.h31 extern int flush_and_install_context(HV_PhysAddr page_table, HV_PTE access,
Dpgtable.c302 # error Code assumes HV_PTE "accessed" bit in second byte in ptep_test_and_clear_young()
321 # error Code assumes HV_PTE "writable" bit in high word in ptep_set_wrprotect()
/linux-4.1.27/arch/tile/kernel/
Dhvglue_trace.c192 HV_WRAP3(int, hv_get_ipi_pte, HV_Coord, tile, int, pl, HV_PTE*, pte)
206 HV_WRAP4(int, hv_install_context, HV_PhysAddr, page_table, HV_PTE, access,
237 HV_PTE, access)
238 HV_WRAP3(void, hv_physaddr_write64, HV_PhysAddr, addr, HV_PTE, access,
Dmachine_kexec.c235 HV_PTE pte; in setup_quasi_va_is_pa()
Dsmp.c241 HV_PTE pte; in ipi_init()
/linux-4.1.27/drivers/net/ethernet/tile/
Dtilepro.c464 HV_PTE pte = *virt_to_pte(current->mm, (unsigned long)va); in tile_net_provide_needed_buffer()
1896 HV_PTE pte = *virt_to_pte(current->mm, (unsigned long)data); in tile_net_tx()