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Searched refs:IXGB_WRITE_REG (Results 1 – 4 of 4) sorted by relevance

/linux-4.1.27/drivers/net/ethernet/intel/ixgb/
Dixgb_ee.c59 IXGB_WRITE_REG(hw, EECD, *eecd_reg); in ixgb_raise_clock()
78 IXGB_WRITE_REG(hw, EECD, *eecd_reg); in ixgb_lower_clock()
116 IXGB_WRITE_REG(hw, EECD, eecd_reg); in ixgb_shift_out_bits()
130 IXGB_WRITE_REG(hw, EECD, eecd_reg); in ixgb_shift_out_bits()
190 IXGB_WRITE_REG(hw, EECD, eecd_reg); in ixgb_setup_eeprom()
194 IXGB_WRITE_REG(hw, EECD, eecd_reg); in ixgb_setup_eeprom()
211 IXGB_WRITE_REG(hw, EECD, eecd_reg); in ixgb_standby_eeprom()
217 IXGB_WRITE_REG(hw, EECD, eecd_reg); in ixgb_standby_eeprom()
223 IXGB_WRITE_REG(hw, EECD, eecd_reg); in ixgb_standby_eeprom()
229 IXGB_WRITE_REG(hw, EECD, eecd_reg); in ixgb_standby_eeprom()
[all …]
Dixgb_hw.c89 IXGB_WRITE_REG(hw, CTRL0, ctrl_reg); in ixgb_mac_reset()
107 IXGB_WRITE_REG(hw, CTRL1, ctrl_reg); in ixgb_mac_reset()
145 IXGB_WRITE_REG(hw, IMC, 0xFFFFFFFF); in ixgb_adapter_stop()
151 IXGB_WRITE_REG(hw, RCTL, IXGB_READ_REG(hw, RCTL) & ~IXGB_RCTL_RXEN); in ixgb_adapter_stop()
152 IXGB_WRITE_REG(hw, TCTL, IXGB_READ_REG(hw, TCTL) & ~IXGB_TCTL_TXEN); in ixgb_adapter_stop()
167 IXGB_WRITE_REG(hw, IMC, 0xffffffff); in ixgb_adapter_stop()
321 IXGB_WRITE_REG(hw, CTRL1, IXGB_CTRL1_EE_RST); in ixgb_init_hw()
694 IXGB_WRITE_REG(hw, CTRL0, ctrl_reg); in ixgb_setup_fc()
697 IXGB_WRITE_REG(hw, PAP, pap_reg); in ixgb_setup_fc()
706 IXGB_WRITE_REG(hw, FCRTL, 0); in ixgb_setup_fc()
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Dixgb_main.c185 IXGB_WRITE_REG(&adapter->hw, IMC, ~0); in ixgb_irq_disable()
202 IXGB_WRITE_REG(&adapter->hw, IMS, val); in ixgb_irq_enable()
227 IXGB_WRITE_REG(&adapter->hw, IMC, 0xffffffff); in ixgb_up()
255 IXGB_WRITE_REG(hw, MFS, hw->max_frame_size << IXGB_MFS_SHIFT); in ixgb_up()
263 IXGB_WRITE_REG(hw, CTRL0, ctrl0); in ixgb_up()
320 IXGB_WRITE_REG(hw, MFS, hw->max_frame_size << IXGB_MFS_SHIFT); in ixgb_reset()
326 IXGB_WRITE_REG(hw, CTRL0, ctrl0); in ixgb_reset()
748 IXGB_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL)); in ixgb_configure_tx()
749 IXGB_WRITE_REG(hw, TDBAH, (tdba >> 32)); in ixgb_configure_tx()
751 IXGB_WRITE_REG(hw, TDLEN, tdlen); in ixgb_configure_tx()
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Dixgb_osdep.h48 #define IXGB_WRITE_REG(a, reg, value) ( \ macro