Searched refs:MC_SEQ_WR_CTL_D1 (Results 1 – 10 of 10) sorted by relevance
112 #define MC_SEQ_WR_CTL_D1 0x28c0 macro
781 #define MC_SEQ_WR_CTL_D1 0x28c0 macro
1881 case MC_SEQ_WR_CTL_D1 >> 2: in btc_check_s0_mc_reg_index()2037 WREG32(MC_SEQ_WR_CTL_D1_LP, RREG32(MC_SEQ_WR_CTL_D1)); in btc_initialize_mc_reg_table()
549 #define MC_SEQ_WR_CTL_D1 0x28c0 macro
664 #define MC_SEQ_WR_CTL_D1 0x28c0 macro
294 #define MC_SEQ_WR_CTL_D1 0x28c0 macro
4418 case MC_SEQ_WR_CTL_D1 >> 2: in ci_check_s0_mc_reg_index()4536 case MC_SEQ_WR_CTL_D1: in ci_register_patching_mc_seq()4617 WREG32(MC_SEQ_WR_CTL_D1_LP, RREG32(MC_SEQ_WR_CTL_D1)); in ci_initialize_mc_reg_table()
2794 case MC_SEQ_WR_CTL_D1 >> 2: in ni_check_s0_mc_reg_index()2891 WREG32(MC_SEQ_WR_CTL_D1_LP, RREG32(MC_SEQ_WR_CTL_D1)); in ni_initialize_mc_reg_table()
1000 eg_pi->mc_reg_table.mc_reg_address[i].s1 = MC_SEQ_WR_CTL_D1 >> 2; in cypress_set_mc_reg_address_table()
5390 case MC_SEQ_WR_CTL_D1 >> 2: in si_check_s0_mc_reg_index()5491 WREG32(MC_SEQ_WR_CTL_D1_LP, RREG32(MC_SEQ_WR_CTL_D1)); in si_initialize_mc_reg_table()