Searched refs:MI_LOAD_REGISTER_IMM (Results 1 – 9 of 9) sorted by relevance
| /linux-4.1.27/drivers/gpu/drm/i915/ |
| D | intel_lrc.c | 722 intel_logical_ring_emit(ringbuf, MI_LOAD_REGISTER_IMM(1)); in intel_execlists_submission() 1114 intel_logical_ring_emit(ringbuf, MI_LOAD_REGISTER_IMM(w->count)); in intel_logical_ring_workarounds_emit() 1764 reg_state[CTX_LRI_HEADER_0] = MI_LOAD_REGISTER_IMM(14); in populate_lr_context() 1766 reg_state[CTX_LRI_HEADER_0] = MI_LOAD_REGISTER_IMM(11); in populate_lr_context() 1806 reg_state[CTX_LRI_HEADER_1] = MI_LOAD_REGISTER_IMM(9); in populate_lr_context() 1827 reg_state[CTX_LRI_HEADER_2] = MI_LOAD_REGISTER_IMM(1); in populate_lr_context()
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| D | i915_gem_context.c | 534 intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(num_rings)); in mi_set_context() 559 intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(num_rings)); in mi_set_context()
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| D | i915_cmd_parser.c | 125 CMD( MI_LOAD_REGISTER_IMM(1), SMI, !F, 0xFF, W, 975 if (desc->cmd.value == MI_LOAD_REGISTER_IMM(1)) in check_cmd()
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| D | i915_gem_gtt.c | 453 intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(1)); in gen8_write_pdp() 456 intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(1)); in gen8_write_pdp() 969 intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(2)); in hsw_mm_switch() 1004 intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(2)); in gen7_mm_switch()
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| D | i915_gem_execbuffer.c | 1086 intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(1)); in i915_reset_gen7_sol_offsets() 1305 intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(1)); in i915_gem_ringbuffer_submission()
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| D | intel_ringbuffer.c | 728 intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(w->count)); in intel_ring_workarounds_emit() 1223 intel_ring_emit(signaller, MI_LOAD_REGISTER_IMM(1)); in gen6_signal()
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| D | i915_gem.c | 4648 intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(1)); in i915_gem_l3_remap()
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| D | i915_reg.h | 336 #define MI_LOAD_REGISTER_IMM(x) MI_INSTR(0x22, 2*(x)-1) macro
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| D | intel_display.c | 9855 intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(1)); in intel_gen7_queue_flip()
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