Searched refs:MMC_TIMING_UHS_DDR50 (Results 1 – 14 of 14) sorted by relevance
62 #define MMC_TIMING_UHS_DDR50 7 macro498 card->host->ios.timing <= MMC_TIMING_UHS_DDR50; in mmc_card_uhs()
279 case MMC_TIMING_UHS_DDR50: in pxav3_set_uhs_signaling()292 uhs == MMC_TIMING_UHS_DDR50) { in pxav3_set_uhs_signaling()
999 case MMC_TIMING_UHS_DDR50: in sd_set_timing()1080 case MMC_TIMING_UHS_DDR50: in sdmmc_set_ios()1300 case MMC_TIMING_UHS_DDR50: in sdmmc_execute_tuning()1315 else if (mmc->ios.timing == MMC_TIMING_UHS_DDR50) in sdmmc_execute_tuning()
299 case MMC_TIMING_UHS_DDR50: in sdhci_st_set_uhs_signaling()
663 if (ios->timing == MMC_TIMING_UHS_DDR50) { in sunxi_mmc_clk_set_rate()728 if (ios->timing == MMC_TIMING_UHS_DDR50) in sunxi_mmc_set_ios()
742 if (ios->timing != MMC_TIMING_UHS_DDR50) { in usdhi6_clk_set()845 if (ios->timing == MMC_TIMING_UHS_DDR50) in usdhi6_set_ios()852 mode = ios->timing == MMC_TIMING_UHS_DDR50; in usdhi6_set_ios()
1089 case MMC_TIMING_UHS_DDR50: in sd_set_timing()1160 case MMC_TIMING_UHS_DDR50: in sdmmc_set_ios()
1165 case MMC_TIMING_UHS_DDR50: in sdhci_get_preset_value()1488 else if ((timing == MMC_TIMING_UHS_DDR50) || in sdhci_set_uhs_signaling()1569 (ios->timing == MMC_TIMING_UHS_DDR50) || in sdhci_do_set_ios()1619 (ios->timing == MMC_TIMING_UHS_DDR50) || in sdhci_do_set_ios()
366 if (host->mmc->ios.timing == MMC_TIMING_UHS_DDR50 || in mmci_set_clkreg()840 if (host->mmc->ios.timing == MMC_TIMING_UHS_DDR50 || in mmci_start_data()
562 (ios->timing != MMC_TIMING_UHS_DDR50) && in omap_hsmmc_set_clock()583 ios->timing == MMC_TIMING_UHS_DDR50) in omap_hsmmc_set_bus_width()
792 case MMC_TIMING_UHS_DDR50: in esdhc_set_uhs_signaling()
495 timing = MMC_TIMING_UHS_DDR50; in sd_set_bus_speed_mode()665 card->host->ios.timing == MMC_TIMING_UHS_DDR50 || in mmc_sd_init_uhs_card()676 if (err && card->host->ios.timing == MMC_TIMING_UHS_DDR50) { in mmc_sd_init_uhs_card()
135 case MMC_TIMING_UHS_DDR50: in mmc_ios_show()
495 timing = MMC_TIMING_UHS_DDR50; in sdio_set_bus_speed_mode()