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Searched refs:NV03_PFIFO_CACHE1_PUSH0 (Results 1 – 5 of 5) sorted by relevance

/linux-4.1.27/drivers/gpu/drm/nouveau/nvkm/engine/fifo/
Dnv04.c211 nv_wr32(priv, NV03_PFIFO_CACHE1_PUSH0, 0); in nv04_fifo_chan_fini()
231 nv_wr32(priv, NV03_PFIFO_CACHE1_PUSH0, 1); in nv04_fifo_chan_fini()
442 nv_wr32(priv, NV03_PFIFO_CACHE1_PUSH0, in nv04_fifo_cache_error()
443 nv_rd32(priv, NV03_PFIFO_CACHE1_PUSH0) & ~1); in nv04_fifo_cache_error()
445 nv_wr32(priv, NV03_PFIFO_CACHE1_PUSH0, in nv04_fifo_cache_error()
446 nv_rd32(priv, NV03_PFIFO_CACHE1_PUSH0) | 1); in nv04_fifo_cache_error()
620 nv_wr32(priv, NV03_PFIFO_CACHE1_PUSH0, 1); in nv04_fifo_init()
Dnv04.h35 #define NV03_PFIFO_CACHE1_PUSH0 0x00003200 macro
Dnv17.c200 nv_wr32(priv, NV03_PFIFO_CACHE1_PUSH0, 1); in nv17_fifo_init()
Dnv40.c341 nv_wr32(priv, NV03_PFIFO_CACHE1_PUSH0, 1); in nv40_fifo_init()
/linux-4.1.27/drivers/gpu/drm/nouveau/
Dnouveau_reg.h470 #define NV03_PFIFO_CACHE1_PUSH0 0x00003200 macro