Searched refs:QCA955X_PLL_DDR_CONFIG_REG (Results 1 – 2 of 2) sorted by relevance
247 #define QCA955X_PLL_DDR_CONFIG_REG 0x04 macro
383 pll = ath79_pll_rr(QCA955X_PLL_DDR_CONFIG_REG); in qca955x_clocks_init()