Searched refs:RADEON_SCLK_MORE_CNTL (Results 1 – 2 of 2) sorted by relevance
516 tmp = RREG32_PLL(RADEON_SCLK_MORE_CNTL); in radeon_legacy_set_clock_gating()519 WREG32_PLL(RADEON_SCLK_MORE_CNTL, tmp); in radeon_legacy_set_clock_gating()569 tmp = RREG32_PLL(RADEON_SCLK_MORE_CNTL); in radeon_legacy_set_clock_gating()572 WREG32_PLL(RADEON_SCLK_MORE_CNTL, tmp); in radeon_legacy_set_clock_gating()687 tmp = RREG32_PLL(RADEON_SCLK_MORE_CNTL); in radeon_legacy_set_clock_gating()698 WREG32_PLL(RADEON_SCLK_MORE_CNTL, tmp); in radeon_legacy_set_clock_gating()759 tmp = RREG32_PLL(RADEON_SCLK_MORE_CNTL); in radeon_legacy_set_clock_gating()761 WREG32_PLL(RADEON_SCLK_MORE_CNTL, tmp); in radeon_legacy_set_clock_gating()803 tmp = RREG32_PLL(RADEON_SCLK_MORE_CNTL); in radeon_legacy_set_clock_gating()805 WREG32_PLL(RADEON_SCLK_MORE_CNTL, tmp); in radeon_legacy_set_clock_gating()[all …]
1698 #define RADEON_SCLK_MORE_CNTL 0x0035 /* PLL */ macro