Searched refs:SH_GIGA_ETH_BASE (Results 1 – 1 of 1) sorted by relevance
599 #define SH_GIGA_ETH_BASE 0xfee00000UL macro600 #define GIGA_MALR(port) (SH_GIGA_ETH_BASE + 0x800 * (port) + 0x05c8)601 #define GIGA_MAHR(port) (SH_GIGA_ETH_BASE + 0x800 * (port) + 0x05c0)614 iowrite32(ARSTR_ARSTR, (void *)(SH_GIGA_ETH_BASE + 0x1800)); in sh_eth_chip_reset_giga()