Searched refs:SOCFPGA_PLL_DIVF_SHIFT (Results 1 – 1 of 1) sorted by relevance
38 #define SOCFPGA_PLL_DIVF_SHIFT 3 macro62 divf = (reg & SOCFPGA_PLL_DIVF_MASK) >> SOCFPGA_PLL_DIVF_SHIFT; in clk_pll_recalc_rate()