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Searched refs:SOR_LANE_SEQ_CTL (Results 1 – 2 of 2) sorted by relevance

/linux-4.1.27/drivers/gpu/drm/tegra/
Dsor.h126 #define SOR_LANE_SEQ_CTL 0x21 macro
Dsor.c563 tegra_sor_writel(sor, value, SOR_LANE_SEQ_CTL); in tegra_sor_power_down()
568 value = tegra_sor_readl(sor, SOR_LANE_SEQ_CTL); in tegra_sor_power_down()
720 DUMP_REG(SOR_LANE_SEQ_CTL); in tegra_sor_show_regs()
1127 tegra_sor_writel(sor, value, SOR_LANE_SEQ_CTL); in tegra_sor_encoder_mode_set()
1130 value = tegra_sor_readl(sor, SOR_LANE_SEQ_CTL); in tegra_sor_encoder_mode_set()