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Searched refs:TEGRA_DIVIDER_ROUND_UP (Results 1 – 8 of 8) sorted by relevance

/linux-4.1.27/drivers/clk/tegra/
Dclk-tegra-periph.c134 30, MASK(2), 0, 0, 8, 1, TEGRA_DIVIDER_ROUND_UP, \
141 30, MASK(2), 0, 0, 8, 1, TEGRA_DIVIDER_ROUND_UP,\
148 29, MASK(3), 0, 0, 8, 1, TEGRA_DIVIDER_ROUND_UP,\
154 29, MASK(3), 0, 0, 8, 1, TEGRA_DIVIDER_ROUND_UP,\
162 TEGRA_DIVIDER_ROUND_UP, _clk_num, _gate_flags,\
169 TEGRA_DIVIDER_ROUND_UP, _clk_num, _gate_flags,\
176 TEGRA_DIVIDER_ROUND_UP, _clk_num, _gate_flags,\
183 TEGRA_DIVIDER_ROUND_UP, _clk_num, 0, _clk_id,\
189 30, MASK(2), 0, 0, 16, 0, TEGRA_DIVIDER_ROUND_UP,\
196 TEGRA_DIVIDER_ROUND_UP, _clk_num, _gate_flags,\
[all …]
Dclk-tegra20.c148 30, 2, 0, 0, 8, 1, TEGRA_DIVIDER_ROUND_UP, \
155 30, 2, 0, 0, 16, 0, TEGRA_DIVIDER_ROUND_UP, \
647 clk_base + PLLC_OUT, 0, TEGRA_DIVIDER_ROUND_UP, in tegra20_pll_init()
662 clk_base + PLLM_OUT, 0, TEGRA_DIVIDER_ROUND_UP, in tegra20_pll_init()
696 clk_base + PLLA_OUT, 0, TEGRA_DIVIDER_ROUND_UP, in tegra20_pll_init()
Dclk-divider.c48 if (flags & TEGRA_DIVIDER_ROUND_UP) in get_div()
Dclk-tegra-audio.c147 clk_base + PLLA_OUT, 0, TEGRA_DIVIDER_ROUND_UP, in tegra_audio_clk_init()
Dclk-tegra30.c185 30, 2, 0, 0, 8, 1, TEGRA_DIVIDER_ROUND_UP, \
191 29, 3, 0, 0, 8, 1, TEGRA_DIVIDER_ROUND_UP, \
198 TEGRA_DIVIDER_ROUND_UP, _clk_num, \
934 clk_base + PLLC_OUT, 0, TEGRA_DIVIDER_ROUND_UP, in tegra30_pll_init()
949 clk_base + PLLM_OUT, 0, TEGRA_DIVIDER_ROUND_UP, in tegra30_pll_init()
Dclk-tegra114.c157 29, MASK(3), 0, 0, 8, 1, TEGRA_DIVIDER_ROUND_UP,\
1059 clk_base + PLLC_OUT, 0, TEGRA_DIVIDER_ROUND_UP, in tegra114_pll_init()
1084 clk_base + PLLM_OUT, 0, TEGRA_DIVIDER_ROUND_UP, in tegra114_pll_init()
Dclk.h79 #define TEGRA_DIVIDER_ROUND_UP BIT(0) macro
Dclk-tegra124.c1169 clk_base + PLLC_OUT, 0, TEGRA_DIVIDER_ROUND_UP, in tegra124_pll_init()
1204 clk_base + PLLM_OUT, 0, TEGRA_DIVIDER_ROUND_UP, in tegra124_pll_init()