Searched refs:UCR1_TXMPTYEN (Results 1 – 1 of 1) sorted by relevance
83 #define UCR1_TXMPTYEN (1<<6) /* Transimitter empty interrupt enable */ macro369 writel(temp & ~UCR1_TXMPTYEN, port->membase + UCR1); in imx_stop_tx()447 temp &= ~UCR1_TXMPTYEN; in imx_transmit_buffer()594 writel(temp | UCR1_TXMPTYEN, sport->port.membase + UCR1); in imx_start_tx()603 temp |= UCR1_TXMPTYEN; in imx_start_tx()757 readl(sport->port.membase + UCR1) & UCR1_TXMPTYEN) || in imx_int()1216 temp &= ~(UCR1_TXMPTYEN | UCR1_RRDYEN | UCR1_RTSDEN | UCR1_UARTEN); in imx_shutdown()1378 writel(old_ucr1 & ~(UCR1_TXMPTYEN | UCR1_RRDYEN | UCR1_RTSDEN), in imx_set_termios()1509 temp &= ~(UCR1_TXMPTYEN | UCR1_RTSDEN); in imx_poll_init()1654 ucr1 &= ~(UCR1_TXMPTYEN | UCR1_RRDYEN | UCR1_RTSDEN); in imx_console_write()