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Searched refs:bXBTxAGC (Results 1 – 10 of 10) sorted by relevance

/linux-4.1.27/drivers/staging/rtl8192u/
Dr819xU_phyreg.h283 #define bXBTxAGC 0xf00 macro
Dr819xU_phy.c828 rtl8192_setBBreg(dev, rFPGA0_TxGainStage, (bXBTxAGC|bXCTxAGC), in rtl8192_BB_Config_ParaFile()
/linux-4.1.27/drivers/staging/rtl8192e/rtl8192e/
Dr819xE_phyreg.h301 #define bXBTxAGC 0xf00 macro
Dr8192E_phyreg.h285 #define bXBTxAGC 0xf00 macro
Dr8192E_phy.c592 (bXBTxAGC|bXCTxAGC|bXDTxAGC), dwRegValue); in rtl8192_BB_Config_ParaFile()
675 (bXBTxAGC|bXCTxAGC|bXDTxAGC), u4RegValue); in rtl8192_phy_setTxPower()
/linux-4.1.27/drivers/staging/rtl8712/
Drtl871x_mp_phy_regdef.h432 #define bXBTxAGC 0xf00 /* Reg 80c rFPGA0_TxGainStage */ macro
Drtl871x_mp.c334 (bXBTxAGC|bXCTxAGC|bXDTxAGC), tmpAGC); in r8712_SetTxAGCOffset()
/linux-4.1.27/drivers/staging/rtl8188eu/include/
DHal8188EPhyReg.h518 #define bXBTxAGC 0xf00 /* Reg 80c rFPGA0_TxGainStage */ macro
Drtw_mp_phy_regdef.h460 #define bXBTxAGC 0xf00 /* Reg 80c rFPGA0_TxGainStage */ macro
/linux-4.1.27/drivers/staging/rtl8723au/include/
DHal8723APhyReg.h451 #define bXBTxAGC 0xf00 /* Reg 80c rFPGA0_TxGainStage */ macro