Home
last modified time | relevance | path

Searched refs:dpaux (Results 1 – 10 of 10) sorted by relevance

/linux-4.1.27/drivers/gpu/drm/tegra/
Ddpaux.c59 static inline unsigned long tegra_dpaux_readl(struct tegra_dpaux *dpaux, in tegra_dpaux_readl() argument
62 return readl(dpaux->regs + (offset << 2)); in tegra_dpaux_readl()
65 static inline void tegra_dpaux_writel(struct tegra_dpaux *dpaux, in tegra_dpaux_writel() argument
69 writel(value, dpaux->regs + (offset << 2)); in tegra_dpaux_writel()
72 static void tegra_dpaux_write_fifo(struct tegra_dpaux *dpaux, const u8 *buffer, in tegra_dpaux_write_fifo() argument
84 tegra_dpaux_writel(dpaux, value, DPAUX_DP_AUXDATA_WRITE(i)); in tegra_dpaux_write_fifo()
88 static void tegra_dpaux_read_fifo(struct tegra_dpaux *dpaux, u8 *buffer, in tegra_dpaux_read_fifo() argument
97 value = tegra_dpaux_readl(dpaux, DPAUX_DP_AUXDATA_READ(i)); in tegra_dpaux_read_fifo()
108 struct tegra_dpaux *dpaux = to_dpaux(aux); in tegra_dpaux_transfer() local
173 tegra_dpaux_writel(dpaux, msg->address, DPAUX_DP_AUXADDR); in tegra_dpaux_transfer()
[all …]
Ddrm.h244 enum drm_connector_status tegra_dpaux_detect(struct tegra_dpaux *dpaux);
245 int tegra_dpaux_attach(struct tegra_dpaux *dpaux, struct tegra_output *output);
246 int tegra_dpaux_detach(struct tegra_dpaux *dpaux);
247 int tegra_dpaux_enable(struct tegra_dpaux *dpaux);
248 int tegra_dpaux_disable(struct tegra_dpaux *dpaux);
249 int tegra_dpaux_prepare(struct tegra_dpaux *dpaux, u8 encoding);
250 int tegra_dpaux_train(struct tegra_dpaux *dpaux, struct drm_dp_link *link,
Dsor.c39 struct tegra_dpaux *dpaux; member
132 err = tegra_dpaux_prepare(sor->dpaux, DP_SET_ANSI_8B10B); in tegra_sor_dp_train_fast()
147 err = tegra_dpaux_train(sor->dpaux, link, pattern); in tegra_sor_dp_train_fast()
168 err = tegra_dpaux_train(sor->dpaux, link, pattern); in tegra_sor_dp_train_fast()
183 err = tegra_dpaux_train(sor->dpaux, link, pattern); in tegra_sor_dp_train_fast()
879 if (sor->dpaux) in tegra_sor_connector_detect()
880 return tegra_dpaux_detect(sor->dpaux); in tegra_sor_connector_detect()
901 if (sor->dpaux) in tegra_sor_connector_get_modes()
902 tegra_dpaux_enable(sor->dpaux); in tegra_sor_connector_get_modes()
906 if (sor->dpaux) in tegra_sor_connector_get_modes()
[all …]
DMakefile14 dpaux.o \
/linux-4.1.27/Documentation/devicetree/bindings/gpu/
Dnvidia,tegra20-host1x.txt224 - nvidia,dpaux: phandle to a DispayPort AUX interface
226 - dpaux: DisplayPort AUX interface
227 - compatible: For Tegra124, must contain "nvidia,tegra124-dpaux". Otherwise,
228 must contain '"nvidia,<chip>-dpaux", "nvidia,tegra124-dpaux"', where
235 - dpaux: clock input for the DPAUX hardware
240 - dpaux
/linux-4.1.27/arch/arm/boot/dts/
Dtegra124-nyan.dtsi31 nvidia,dpaux = <&dpaux>;
35 dpaux@0,545c0000 {
Dtegra124.dtsi153 dpaux: dpaux@0,545c0000 { label
154 compatible = "nvidia,tegra124-dpaux";
159 clock-names = "dpaux", "parent";
161 reset-names = "dpaux";
Dtegra124-venice2.dts36 nvidia,dpaux = <&dpaux>;
40 dpaux@0,545c0000 {
977 ddc-i2c-bus = <&dpaux>;
Dtegra124-nyan-big.dts15 ddc-i2c-bus = <&dpaux>;
Dtegra124-nyan-blaze.dts15 ddc-i2c-bus = <&dpaux>;