Searched refs:drvsel (Results 1 – 2 of 2) sorted by relevance
41 #define SYSMGR_SDMMC_CTRL_SET(smplsel, drvsel) \ argument42 ((((smplsel) & 0x7) << 3) | (((drvsel) & 0x7) << 0))
28 value is the cclk_in_drv(drvsel). The clk-phase is used to enable the correct