Searched refs:ieee754_csr (Results 1 – 18 of 18) sorted by relevance
79 oldcsr = ieee754_csr; in ieee754dp_sqrt()80 ieee754_csr.mx &= ~IEEE754_INEXACT; in ieee754dp_sqrt()81 ieee754_csr.sx &= ~IEEE754_INEXACT; in ieee754dp_sqrt()82 ieee754_csr.rm = FPU_CSR_RN; in ieee754dp_sqrt()124 ieee754_csr.rm = FPU_CSR_RZ; in ieee754dp_sqrt()125 ieee754_csr.sx &= ~IEEE754_INEXACT; in ieee754dp_sqrt()130 if (ieee754_csr.sx & IEEE754_INEXACT || t.bits != y.bits) { in ieee754dp_sqrt()132 if (!(ieee754_csr.sx & IEEE754_INEXACT)) in ieee754dp_sqrt()160 ieee754_csr = oldcsr; in ieee754dp_sqrt()
29 oldrm = ieee754_csr.rm; in ieee754sp_neg()30 ieee754_csr.rm = FPU_CSR_RD; in ieee754sp_neg()32 ieee754_csr.rm = oldrm; in ieee754sp_neg()41 oldrm = ieee754_csr.rm; in ieee754sp_abs()42 ieee754_csr.rm = FPU_CSR_RD; in ieee754sp_abs()47 ieee754_csr.rm = oldrm; in ieee754sp_abs()
29 oldrm = ieee754_csr.rm; in ieee754dp_neg()30 ieee754_csr.rm = FPU_CSR_RD; in ieee754dp_neg()32 ieee754_csr.rm = oldrm; in ieee754dp_neg()41 oldrm = ieee754_csr.rm; in ieee754dp_abs()42 ieee754_csr.rm = FPU_CSR_RD; in ieee754dp_abs()47 ieee754_csr.rm = oldrm; in ieee754dp_abs()
145 #define ieee754_csr (*(struct _ieee754_csr *)(¤t->thread.fpu.fcr31)) macro149 return (ieee754_csr.rm); in ieee754_getrm()153 return (ieee754_csr.rm = rm); in ieee754_setrm()161 return (ieee754_csr.cx); in ieee754_getcx()168 return (ieee754_csr.cx & n); in ieee754_cxtest()176 return (ieee754_csr.sx); in ieee754_getsx()183 return (ieee754_csr.sx = 0); in ieee754_clrsx()190 return (ieee754_csr.sx & n); in ieee754_sxtest()
31 ieee754_csr.cx = 0; in ieee754_clearcx()36 ieee754_csr.cx |= flags; in ieee754_setcx()37 ieee754_csr.sx |= flags; in ieee754_setcx()44 return ieee754_csr.mx & x; in ieee754_setandtestcx()121 if (ieee754_csr.nod) { \132 if (ieee754_csr.nod) { \
62 switch (ieee754_csr.rm) { in ieee754sp_get_rounding()99 if (ieee754_csr.nod) { in ieee754sp_format()103 switch(ieee754_csr.rm) { in ieee754sp_format()165 switch (ieee754_csr.rm) { in ieee754sp_format()187 if (ieee754_csr.mx & IEEE754_UNDERFLOW) in ieee754sp_format()
62 switch (ieee754_csr.rm) { in ieee754dp_get_rounding()99 if (ieee754_csr.nod) { in ieee754dp_format()103 switch(ieee754_csr.rm) { in ieee754dp_format()167 switch (ieee754_csr.rm) { in ieee754dp_format()189 if (ieee754_csr.mx & IEEE754_UNDERFLOW) in ieee754dp_format()
66 if ((ieee754_csr.rm == FPU_CSR_RU && !xs) || in ieee754sp_fdp()67 (ieee754_csr.rm == FPU_CSR_RD && xs)) in ieee754sp_fdp()
95 return ieee754sp_zero(ieee754_csr.rm == FPU_CSR_RD); in ieee754sp_add()164 return ieee754sp_zero(ieee754_csr.rm == FPU_CSR_RD); in ieee754sp_add()
95 return ieee754sp_zero(ieee754_csr.rm == FPU_CSR_RD); in ieee754sp_sub()164 if (ieee754_csr.rm == FPU_CSR_RD) in ieee754sp_sub()
95 return ieee754dp_zero(ieee754_csr.rm == FPU_CSR_RD); in ieee754dp_add()167 return ieee754dp_zero(ieee754_csr.rm == FPU_CSR_RD); in ieee754dp_add()
95 return ieee754dp_zero(ieee754_csr.rm == FPU_CSR_RD); in ieee754dp_sub()170 if (ieee754_csr.rm == FPU_CSR_RD) in ieee754dp_sub()
1410 ieee754_csr_save = ieee754_csr; \1412 ieee754_csr_save.cx |= ieee754_csr.cx; \1413 ieee754_csr_save.sx |= ieee754_csr.sx; \1415 ieee754_csr.cx |= ieee754_csr_save.cx; \1416 ieee754_csr.sx |= ieee754_csr_save.sx; \1810 oldrm = ieee754_csr.rm; in fpu_emu()1812 ieee754_csr.rm = MIPSInst_FUNC(ir); in fpu_emu()1814 ieee754_csr.rm = oldrm; in fpu_emu()1834 oldrm = ieee754_csr.rm; in fpu_emu()1836 ieee754_csr.rm = MIPSInst_FUNC(ir); in fpu_emu()[all …]
78 switch (ieee754_csr.rm) { in ieee754sp_tlong()
76 switch (ieee754_csr.rm) { in ieee754dp_tint()
81 switch (ieee754_csr.rm) { in ieee754sp_tint()
101 switch (ieee754_csr.rm) { in ieee754sp_sqrt()
81 switch (ieee754_csr.rm) { in ieee754dp_tlong()