Home
last modified time | relevance | path

Searched refs:length_dw (Results 1 – 23 of 23) sorted by relevance

/linux-4.1.27/drivers/gpu/drm/radeon/
Dsi_dma.c79 ib->ptr[ib->length_dw++] = DMA_PACKET(DMA_PACKET_COPY, in si_dma_vm_copy_pages()
81 ib->ptr[ib->length_dw++] = lower_32_bits(pe); in si_dma_vm_copy_pages()
82 ib->ptr[ib->length_dw++] = lower_32_bits(src); in si_dma_vm_copy_pages()
83 ib->ptr[ib->length_dw++] = upper_32_bits(pe) & 0xff; in si_dma_vm_copy_pages()
84 ib->ptr[ib->length_dw++] = upper_32_bits(src) & 0xff; in si_dma_vm_copy_pages()
120 ib->ptr[ib->length_dw++] = DMA_PACKET(DMA_PACKET_WRITE, 0, 0, 0, ndw); in si_dma_vm_write_pages()
121 ib->ptr[ib->length_dw++] = pe; in si_dma_vm_write_pages()
122 ib->ptr[ib->length_dw++] = upper_32_bits(pe) & 0xff; in si_dma_vm_write_pages()
133 ib->ptr[ib->length_dw++] = value; in si_dma_vm_write_pages()
134 ib->ptr[ib->length_dw++] = upper_32_bits(value); in si_dma_vm_write_pages()
[all …]
Dradeon_vce.c345 ib.length_dw = 0; in radeon_vce_get_create_msg()
346 ib.ptr[ib.length_dw++] = 0x0000000c; /* len */ in radeon_vce_get_create_msg()
347 ib.ptr[ib.length_dw++] = 0x00000001; /* session cmd */ in radeon_vce_get_create_msg()
348 ib.ptr[ib.length_dw++] = handle; in radeon_vce_get_create_msg()
350 ib.ptr[ib.length_dw++] = 0x00000030; /* len */ in radeon_vce_get_create_msg()
351 ib.ptr[ib.length_dw++] = 0x01000001; /* create cmd */ in radeon_vce_get_create_msg()
352 ib.ptr[ib.length_dw++] = 0x00000000; in radeon_vce_get_create_msg()
353 ib.ptr[ib.length_dw++] = 0x00000042; in radeon_vce_get_create_msg()
354 ib.ptr[ib.length_dw++] = 0x0000000a; in radeon_vce_get_create_msg()
355 ib.ptr[ib.length_dw++] = 0x00000001; in radeon_vce_get_create_msg()
[all …]
Dni_dma.c146 radeon_ring_write(ring, (ib->length_dw << 12) | (upper_32_bits(ib->gpu_addr) & 0xFF)); in cayman_dma_ring_ib_execute()
327 ib->ptr[ib->length_dw++] = DMA_PACKET(DMA_PACKET_COPY, in cayman_dma_vm_copy_pages()
329 ib->ptr[ib->length_dw++] = lower_32_bits(pe); in cayman_dma_vm_copy_pages()
330 ib->ptr[ib->length_dw++] = lower_32_bits(src); in cayman_dma_vm_copy_pages()
331 ib->ptr[ib->length_dw++] = upper_32_bits(pe) & 0xff; in cayman_dma_vm_copy_pages()
332 ib->ptr[ib->length_dw++] = upper_32_bits(src) & 0xff; in cayman_dma_vm_copy_pages()
368 ib->ptr[ib->length_dw++] = DMA_PACKET(DMA_PACKET_WRITE, in cayman_dma_vm_write_pages()
370 ib->ptr[ib->length_dw++] = pe; in cayman_dma_vm_write_pages()
371 ib->ptr[ib->length_dw++] = upper_32_bits(pe) & 0xff; in cayman_dma_vm_write_pages()
382 ib->ptr[ib->length_dw++] = value; in cayman_dma_vm_write_pages()
[all …]
Dradeon_cs.c90 p->nrelocs = chunk->length_dw / 4; in radeon_cs_parser_relocs()
298 p->chunks[i].length_dw = user_chunk.length_dw; in radeon_cs_parser_init()
305 if (p->chunks[i].length_dw == 0) in radeon_cs_parser_init()
311 if (p->chunks[i].length_dw == 0) in radeon_cs_parser_init()
317 if (p->chunks[i].length_dw == 0) in radeon_cs_parser_init()
321 size = p->chunks[i].length_dw; in radeon_cs_parser_init()
342 if (p->chunks[i].length_dw > 1) in radeon_cs_parser_init()
344 if (p->chunks[i].length_dw > 2) in radeon_cs_parser_init()
535 if (parser->const_ib.length_dw) { in radeon_cs_ib_vm_chunk()
601 if (ib_chunk->length_dw > RADEON_IB_VM_MAX_SIZE) { in radeon_cs_ib_fill()
[all …]
Dcik_sdma.c157 radeon_ring_write(ring, ib->length_dw); in cik_sdma_ring_ib_execute()
732 ib.length_dw = 5; in cik_sdma_ib_test()
808 ib->ptr[ib->length_dw++] = SDMA_PACKET(SDMA_OPCODE_COPY, in cik_sdma_vm_copy_pages()
810 ib->ptr[ib->length_dw++] = bytes; in cik_sdma_vm_copy_pages()
811 ib->ptr[ib->length_dw++] = 0; /* src/dst endian swap */ in cik_sdma_vm_copy_pages()
812 ib->ptr[ib->length_dw++] = lower_32_bits(src); in cik_sdma_vm_copy_pages()
813 ib->ptr[ib->length_dw++] = upper_32_bits(src); in cik_sdma_vm_copy_pages()
814 ib->ptr[ib->length_dw++] = lower_32_bits(pe); in cik_sdma_vm_copy_pages()
815 ib->ptr[ib->length_dw++] = upper_32_bits(pe); in cik_sdma_vm_copy_pages()
851 ib->ptr[ib->length_dw++] = SDMA_PACKET(SDMA_OPCODE_WRITE, in cik_sdma_vm_write_pages()
[all …]
Dradeon_uvd.c541 if (idx >= relocs_chunk->length_dw) { in radeon_uvd_cs_reloc()
543 idx, relocs_chunk->length_dw); in radeon_uvd_cs_reloc()
655 if (p->chunk_ib->length_dw % 16) { in radeon_uvd_cs_parse()
657 p->chunk_ib->length_dw); in radeon_uvd_cs_parse()
685 } while (p->idx < p->chunk_ib->length_dw); in radeon_uvd_cs_parse()
714 ib.length_dw = 16; in radeon_uvd_send_msg()
Dradeon_vm.c411 ib.length_dw = 0; in radeon_vm_clear_bo()
415 WARN_ON(ib.length_dw > 64); in radeon_vm_clear_bo()
666 ib.length_dw = 0; in radeon_vm_update_page_directory()
703 if (ib.length_dw != 0) { in radeon_vm_update_page_directory()
707 WARN_ON(ib.length_dw > ndw); in radeon_vm_update_page_directory()
999 ib.length_dw = 0; in radeon_vm_bo_update()
1017 WARN_ON(ib.length_dw > ndw); in radeon_vm_bo_update()
Dr600_dma.c363 ib.length_dw = 4; in r600_dma_ib_test()
422 radeon_ring_write(ring, (ib->length_dw << 16) | (upper_32_bits(ib->gpu_addr) & 0xFF)); in r600_dma_ring_ib_execute()
Devergreen_dma.c90 radeon_ring_write(ring, (ib->length_dw << 12) | (upper_32_bits(ib->gpu_addr) & 0xFF)); in evergreen_dma_ring_ib_execute()
Dr600_cs.c2319 } while (p->idx < p->chunk_ib->length_dw); in r600_cs_parse()
2321 for (r = 0; r < p->ib.length_dw; r++) { in r600_cs_parse()
2402 parser.ib.length_dw = ib_chunk->length_dw; in r600_cs_legacy()
2403 *l = parser.ib.length_dw; in r600_cs_legacy()
2404 if (copy_from_user(ib, ib_chunk->user_ptr, ib_chunk->length_dw * 4)) { in r600_cs_legacy()
2484 if (p->idx >= ib_chunk->length_dw) { in r600_dma_cs_parse()
2486 p->idx, ib_chunk->length_dw); in r600_dma_cs_parse()
2622 } while (p->idx < p->chunk_ib->length_dw); in r600_dma_cs_parse()
2624 for (r = 0; r < p->ib->length_dw; r++) { in r600_dma_cs_parse()
Dradeon_ib.c128 if (!ib->length_dw || !ring->ready) { in radeon_ib_schedule()
Dradeon_trace.h40 __entry->dw = p->chunk_ib->length_dw;
Devergreen_cs.c2734 } while (p->idx < p->chunk_ib->length_dw); in evergreen_cs_parse()
2736 for (r = 0; r < p->ib.length_dw; r++) { in evergreen_cs_parse()
2766 if (p->idx >= ib_chunk->length_dw) { in evergreen_dma_cs_parse()
2768 p->idx, ib_chunk->length_dw); in evergreen_dma_cs_parse()
3173 } while (p->idx < p->chunk_ib->length_dw); in evergreen_dma_cs_parse()
3175 for (r = 0; r < p->ib->length_dw; r++) { in evergreen_dma_cs_parse()
3488 } while (idx < ib->length_dw); in evergreen_ib_parse()
3590 } while (idx < ib->length_dw); in evergreen_dma_ib_parse()
Duvd_v1_0.c488 radeon_ring_write(ring, ib->length_dw); in uvd_v1_0_ib_execute()
Dr300.c1292 } while (p->idx < p->chunk_ib->length_dw); in r300_cs_parse()
Dr100.c2074 } while (p->idx < p->chunk_ib->length_dw); in r100_cs_parse()
3688 radeon_ring_write(ring, ib->length_dw); in r100_ring_ib_execute()
3718 ib.length_dw = 8; in r100_ib_test()
Dradeon.h838 uint32_t length_dw; member
1064 uint32_t length_dw; member
Dni.c1432 radeon_ring_write(ring, ib->length_dw | (vm_id << 24)); in cayman_ring_ib_execute()
Dsi.c3437 radeon_ring_write(ring, ib->length_dw | (vm_id << 24)); in si_ring_ib_execute()
4766 for (i = 0; i < ib->length_dw; i++) { in si_ib_parse()
4774 } while (idx < ib->length_dw); in si_ib_parse()
Dr600.c3306 radeon_ring_write(ring, ib->length_dw); in r600_ring_ib_execute()
3331 ib.length_dw = 3; in r600_ib_test()
Dcik.c4148 control |= ib->length_dw | (vm_id << 24); in cik_ring_ib_execute()
4193 ib.length_dw = 3; in cik_ib_test()
Devergreen.c3002 radeon_ring_write(ring, ib->length_dw); in evergreen_ring_ib_execute()
/linux-4.1.27/include/uapi/drm/
Dradeon_drm.h965 uint32_t length_dw; member