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Searched refs:pins (Results 1 – 200 of 930) sorted by relevance

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/linux-4.1.27/drivers/base/
Dpinctrl.c26 dev->pins = devm_kzalloc(dev, sizeof(*(dev->pins)), GFP_KERNEL); in pinctrl_bind_pins()
27 if (!dev->pins) in pinctrl_bind_pins()
30 dev->pins->p = devm_pinctrl_get(dev); in pinctrl_bind_pins()
31 if (IS_ERR(dev->pins->p)) { in pinctrl_bind_pins()
33 ret = PTR_ERR(dev->pins->p); in pinctrl_bind_pins()
37 dev->pins->default_state = pinctrl_lookup_state(dev->pins->p, in pinctrl_bind_pins()
39 if (IS_ERR(dev->pins->default_state)) { in pinctrl_bind_pins()
45 ret = pinctrl_select_state(dev->pins->p, dev->pins->default_state); in pinctrl_bind_pins()
57 dev->pins->sleep_state = pinctrl_lookup_state(dev->pins->p, in pinctrl_bind_pins()
59 if (IS_ERR(dev->pins->sleep_state)) in pinctrl_bind_pins()
[all …]
/linux-4.1.27/arch/arm/boot/dts/
Dtegra124-nyan-big.dts35 nvidia,pins = "clk_32k_out_pa0";
41 nvidia,pins = "uart3_cts_n_pa1";
48 nvidia,pins = "dap2_fs_pa2";
55 nvidia,pins = "dap2_sclk_pa3";
62 nvidia,pins = "dap2_din_pa4";
69 nvidia,pins = "dap2_dout_pa5";
76 nvidia,pins = "sdmmc3_clk_pa6";
83 nvidia,pins = "sdmmc3_cmd_pa7";
90 nvidia,pins = "pb0";
97 nvidia,pins = "pb1";
[all …]
Dtegra124-nyan-blaze.dts31 nvidia,pins = "clk_32k_out_pa0";
37 nvidia,pins = "uart3_cts_n_pa1";
44 nvidia,pins = "dap2_fs_pa2";
51 nvidia,pins = "dap2_sclk_pa3";
58 nvidia,pins = "dap2_din_pa4";
65 nvidia,pins = "dap2_dout_pa5";
72 nvidia,pins = "sdmmc3_clk_pa6";
79 nvidia,pins = "sdmmc3_cmd_pa7";
86 nvidia,pins = "pb0";
93 nvidia,pins = "pb1";
[all …]
Dste-href-family-pinctrl.dtsi25 pins = "GPIO0_AJ5", "GPIO2_AH4"; /* CTS+RXD */
30 pins = "GPIO1_AJ3", "GPIO3_AH3"; /* RTS+TXD */
37 pins = "GPIO0_AJ5", "GPIO2_AH4"; /* CTS+RXD */
42 pins = "GPIO1_AJ3"; /* RTS */
47 pins = "GPIO3_AH3"; /* TXD */
60 pins = "GPIO4_AH6"; /* RXD */
65 pins = "GPIO5_AG6"; /* TXD */
72 pins = "GPIO4_AH6"; /* RXD */
77 pins = "GPIO5_AG6"; /* TXD */
90 pins = "GPIO29_W2"; /* RXD */
[all …]
Ds3c64xx-pinctrl.dtsi140 samsung,pins = "gpa-0", "gpa-1";
146 samsung,pins = "gpa-2", "gpa-3";
152 samsung,pins = "gpa-4", "gpa-5";
158 samsung,pins = "gpa-6", "gpa-7";
164 samsung,pins = "gpb-0", "gpb-1";
170 samsung,pins = "gpb-2", "gpb-3";
176 samsung,pins = "gpb-0", "gpb-1";
182 samsung,pins = "gpb-2", "gpb-3";
188 samsung,pins = "gpb-0", "gpb-1";
194 samsung,pins = "gpb-2", "gpb-3";
[all …]
Dtegra30-beaver.dts66 nvidia,pins = "clk_32k_out_pa0";
73 nvidia,pins = "uart3_cts_n_pa1";
80 nvidia,pins = "dap2_fs_pa2";
87 nvidia,pins = "dap2_sclk_pa3";
94 nvidia,pins = "dap2_din_pa4";
101 nvidia,pins = "dap2_dout_pa5";
108 nvidia,pins = "sdmmc3_clk_pa6";
115 nvidia,pins = "sdmmc3_cmd_pa7";
122 nvidia,pins = "gmi_a17_pb0";
129 nvidia,pins = "gmi_a18_pb1";
[all …]
Dtegra124-jetson-tk1.dts62 nvidia,pins = "clk_32k_out_pa0";
69 nvidia,pins = "uart3_cts_n_pa1";
76 nvidia,pins = "dap2_fs_pa2";
83 nvidia,pins = "dap2_sclk_pa3";
90 nvidia,pins = "dap2_din_pa4";
97 nvidia,pins = "dap2_dout_pa5";
104 nvidia,pins = "sdmmc3_clk_pa6";
111 nvidia,pins = "sdmmc3_cmd_pa7";
118 nvidia,pins = "pb0";
125 nvidia,pins = "pb1";
[all …]
Dtegra20-trimslice.dts39 nvidia,pins = "ata";
43 nvidia,pins = "atb", "gma";
47 nvidia,pins = "atc", "gmb";
51 nvidia,pins = "atd", "ate", "gme", "pta";
55 nvidia,pins = "cdev1";
59 nvidia,pins = "cdev2";
63 nvidia,pins = "crtp";
67 nvidia,pins = "csus";
71 nvidia,pins = "dap1";
75 nvidia,pins = "dap2";
[all …]
Ds5pv210-pinctrl.dtsi272 samsung,pins = "gpa0-0", "gpa0-1";
279 samsung,pins = "gpa0-2", "gpa0-3";
286 samsung,pins = "gpa0-4", "gpa0-5";
293 samsung,pins = "gpa0-6", "gpa0-7";
300 samsung,pins = "gpa1-0", "gpa1-1";
307 samsung,pins = "gpa1-2", "gpa1-3";
314 samsung,pins = "gpa1-2", "gpa1-3";
321 samsung,pins = "gpa1-2", "gpa1-3";
328 samsung,pins = "gpb-0", "gpb-2", "gpb-3";
335 samsung,pins = "gpb-4", "gpb-6", "gpb-7";
[all …]
Dste-href-ab8500.dtsi54 pins = "GPIO2_T9";
67 pins = "GPIO4_W2";
80 pins = "GPIO10_U17";
93 pins = "GPIO11_AA18";
106 pins = "GPIO12_U16";
119 pins = "GPIO13_W17";
132 pins = "GPIO16_F15";
145 pins = "GPIO24_T14";
158 pins = "GPIO25_R16";
171 pins = "GPIO36_A17";
[all …]
Dste-ccu8540-pinctrl.dtsi26 pins = "GPIO0", "GPIO2";
31 pins = "GPIO1", "GPIO3";
38 pins = "GPIO0", "GPIO2";
43 pins = "GPIO1", "GPIO3";
57 pins = "GPIO120";
62 pins = "GPIO121";
69 pins = "GPIO120";
74 pins = "GPIO121";
90 pins = "GPIO147", "GPIO148";
97 pins = "GPIO147", "GPIO148";
[all …]
Dtegra20-tamonten.dtsi34 nvidia,pins = "ata";
38 nvidia,pins = "atb", "gma", "gme";
42 nvidia,pins = "atc";
46 nvidia,pins = "atd", "ate", "gmb", "gmd", "gpu",
51 nvidia,pins = "cdev1";
55 nvidia,pins = "cdev2";
59 nvidia,pins = "crtp";
63 nvidia,pins = "csus";
67 nvidia,pins = "dap1";
71 nvidia,pins = "dap2";
[all …]
Dexynos4210-pinctrl.dtsi148 samsung,pins = "gpa0-0", "gpa0-1";
155 samsung,pins = "gpa0-2", "gpa0-3";
162 samsung,pins = "gpa0-4", "gpa0-5";
169 samsung,pins = "gpa0-6", "gpa0-7";
176 samsung,pins = "gpa0-6", "gpa0-7";
183 samsung,pins = "gpa1-0", "gpa1-1";
190 samsung,pins = "gpa1-2", "gpa1-3";
197 samsung,pins = "gpa1-0", "gpa1-1";
204 samsung,pins = "gpa1-2", "gpa1-3";
211 samsung,pins = "gpa1-4", "gpa1-5";
[all …]
Dexynos4415-pinctrl.dtsi96 samsung,pins = "gpa0-0", "gpa0-1";
103 samsung,pins = "gpa0-2", "gpa0-3";
110 samsung,pins = "gpa0-4", "gpa0-5";
117 samsung,pins = "gpa0-6", "gpa0-7";
124 samsung,pins = "gpa1-0", "gpa1-1";
131 samsung,pins = "gpa1-2", "gpa1-3";
138 samsung,pins = "gpa1-4", "gpa1-5";
145 samsung,pins = "gpa0-6", "gpa0-7";
152 samsung,pins = "gpa1-2", "gpa1-3";
159 samsung,pins = "gpb-0", "gpb-2", "gpb-3";
[all …]
Drk3188.dtsi180 rockchip,pins = <RK_GPIO0 24 RK_FUNC_2 &pcfg_pull_none>;
184 rockchip,pins = <RK_GPIO0 26 RK_FUNC_2 &pcfg_pull_up>;
188 rockchip,pins = <RK_GPIO0 27 RK_FUNC_2 &pcfg_pull_none>;
192 * The data pins are shared between nandc and emmc and
201 rockchip,pins = <RK_GPIO3 16 RK_FUNC_2 &pcfg_pull_none>, /* tx_en */
212 rockchip,pins = <RK_GPIO3 24 RK_FUNC_2 &pcfg_pull_none>,
219 rockchip,pins = <RK_GPIO1 24 RK_FUNC_1 &pcfg_pull_none>,
226 rockchip,pins = <RK_GPIO1 26 RK_FUNC_1 &pcfg_pull_none>,
233 rockchip,pins = <RK_GPIO1 28 RK_FUNC_1 &pcfg_pull_none>,
240 rockchip,pins = <RK_GPIO3 14 RK_FUNC_2 &pcfg_pull_none>,
[all …]
Dexynos5420-pinctrl.dtsi64 samsung,pins = "gpx0-7";
156 samsung,pins = "gpc0-0";
163 samsung,pins = "gpc0-1";
170 samsung,pins = "gpc0-2";
177 samsung,pins = "gpc0-3";
184 samsung,pins = "gpc0-4", "gpc0-5", "gpc0-6";
191 samsung,pins = "gpc3-0", "gpc3-1", "gpc3-2", "gpc3-3";
198 samsung,pins = "gpc1-0";
205 samsung,pins = "gpc0-7";
212 samsung,pins = "gpc1-1";
[all …]
Dexynos4x12-pinctrl.dtsi26 samsung,pins = #_pin; \
138 samsung,pins = "gpa0-0", "gpa0-1";
145 samsung,pins = "gpa0-2", "gpa0-3";
152 samsung,pins = "gpa0-4", "gpa0-5";
159 samsung,pins = "gpa0-6", "gpa0-7";
166 samsung,pins = "gpa0-6", "gpa0-7";
173 samsung,pins = "gpa1-0", "gpa1-1";
180 samsung,pins = "gpa1-2", "gpa1-3";
187 samsung,pins = "gpa1-0", "gpa1-1";
194 samsung,pins = "gpa1-2", "gpa1-3";
[all …]
Dexynos5250-pinctrl.dtsi203 samsung,pins = "gpa0-0", "gpa0-1";
210 samsung,pins = "gpa0-2", "gpa0-3";
217 samsung,pins = "gpa0-6", "gpa0-7";
224 samsung,pins = "gpa0-6", "gpa0-7";
231 samsung,pins = "gpa1-0", "gpa1-1";
238 samsung,pins = "gpa1-2", "gpa1-3";
245 samsung,pins = "gpa1-2", "gpa1-3";
252 samsung,pins = "gpa1-2", "gpa1-3";
259 samsung,pins = "gpa1-4", "gpa1-4";
266 samsung,pins = "gpa2-0", "gpa2-2", "gpa2-3";
[all …]
Ds3c2416-pinctrl.dtsi85 samsung,pins = "gph-0", "gph-1";
90 samsung,pins = "gph-8", "gph-9";
95 samsung,pins = "gph-2", "gph-3";
100 samsung,pins = "gph-10", "gph-11";
105 samsung,pins = "gph-4", "gph-5";
110 samsung,pins = "gph-6", "gph-7";
115 samsung,pins = "gph-6", "gph-7";
120 samsung,pins = "gph-12";
125 samsung,pins = "gpe-14", "gpe-15";
130 samsung,pins = "gpe-11", "gpe-12", "gpe-13";
[all …]
Dhi3620-hi4511.dts72 pinctrl-single,pins = <
78 pinctrl-single,pins = <
84 pinctrl-single,pins = <
90 pinctrl-single,pins = <
96 pinctrl-single,pins = <
102 pinctrl-single,pins = <
108 pinctrl-single,pins = <
114 pinctrl-single,pins = <
120 pinctrl-single,pins = <
126 pinctrl-single,pins = <
[all …]
Drk3066a.dtsi239 rockchip,pins = <RK_GPIO1 16 RK_FUNC_2 &pcfg_pull_none>, /* mac_clk */
250 rockchip,pins = <RK_GPIO1 24 RK_FUNC_2 &pcfg_pull_none>, /* mac_md */
257 rockchip,pins = <RK_GPIO3 31 RK_FUNC_2 &pcfg_pull_default>;
261 rockchip,pins = <RK_GPIO4 9 RK_FUNC_2 &pcfg_pull_default>;
265 rockchip,pins = <RK_GPIO4 10 RK_FUNC_2 &pcfg_pull_default>;
269 * The data pins are shared between nandc and emmc and
278 rockchip,pins = <RK_GPIO2 28 RK_FUNC_1 &pcfg_pull_none>,
285 rockchip,pins = <RK_GPIO2 30 RK_FUNC_1 &pcfg_pull_none>,
292 rockchip,pins = <RK_GPIO3 0 RK_FUNC_1 &pcfg_pull_none>,
299 rockchip,pins = <RK_GPIO3 2 RK_FUNC_2 &pcfg_pull_none>,
[all …]
Dtegra114-roth.dts57 nvidia,pins = "clk1_out_pw4";
64 nvidia,pins = "dap1_din_pn1";
71 nvidia,pins = "dap1_dout_pn2",
80 nvidia,pins = "dap2_din_pa4";
87 nvidia,pins = "dap2_dout_pa5",
96 nvidia,pins = "dap4_din_pp5",
106 nvidia,pins = "dvfs_pwm_px0",
114 nvidia,pins = "ulpi_clk_py0",
129 nvidia,pins = "ulpi_dir_py1",
137 nvidia,pins = "ulpi_stp_py3";
[all …]
Dexynos3250-pinctrl.dtsi26 samsung,pins = #_pin; \
89 samsung,pins = "gpa0-0", "gpa0-1";
96 samsung,pins = "gpa0-2", "gpa0-3";
103 samsung,pins = "gpa0-4", "gpa0-5";
110 samsung,pins = "gpa0-6", "gpa0-7";
117 samsung,pins = "gpa0-6", "gpa0-7";
124 samsung,pins = "gpa1-2", "gpa1-3";
131 samsung,pins = "gpb-0", "gpb-2", "gpb-3";
138 samsung,pins = "gpb-0", "gpb-1";
145 samsung,pins = "gpb-4", "gpb-6", "gpb-7";
[all …]
Dexynos5260-pinctrl.dtsi189 samsung,pins = "gpa0-0", "gpa0-1";
196 samsung,pins = "gpa0-2", "gpa0-3";
203 samsung,pins = "gpa1-0", "gpa1-1";
210 samsung,pins = "gpa1-2", "gpa1-3";
217 samsung,pins = "gpa1-4", "gpa1-5";
224 samsung,pins = "gpa2-0", "gpa2-2", "gpa2-3";
231 samsung,pins = "gpa2-4", "gpa2-6", "gpa2-7";
238 samsung,pins = "gpa2-4";
245 samsung,pins = "gpb0-0", "gpb0-1", "gpb0-2", "gpb0-3",
253 samsung,pins = "gpb0-0", "gpb0-1", "gpb0-2", "gpb0-3",
[all …]
Dtegra20-ventana.dts47 nvidia,pins = "ata";
51 nvidia,pins = "atb", "gma", "gme";
55 nvidia,pins = "atc";
59 nvidia,pins = "atd", "ate", "gmb", "spia",
64 nvidia,pins = "cdev1";
68 nvidia,pins = "cdev2";
72 nvidia,pins = "crtp", "lm1";
76 nvidia,pins = "csus";
80 nvidia,pins = "dap1";
84 nvidia,pins = "dap2";
[all …]
Dtegra20-whistler.dts39 nvidia,pins = "ata", "atb", "ate", "gma", "gmb",
44 nvidia,pins = "atc", "atd";
48 nvidia,pins = "cdev1";
52 nvidia,pins = "cdev2";
56 nvidia,pins = "crtp";
60 nvidia,pins = "csus";
64 nvidia,pins = "dap1";
68 nvidia,pins = "dap2";
72 nvidia,pins = "dap3";
76 nvidia,pins = "dap4";
[all …]
Dste-href-ab8505.dtsi42 pins = "GPIO2_R5";
55 pins = "GPIO10_B16";
68 pins = "GPIO11_B17";
81 pins = "GPIO13_D17";
94 pins = "GPIO34_H14";
107 pins = "GPIO50_L4";
121 pins = "GPIO14_C16";
135 pins = "GPIO17_P2",
144 /* Modem I2C setup (SCL and SDA pins) */
152 pins = "GPIO40_J15",
[all …]
Dkirkwood-dnskw.dtsi61 marvell,pins = "mpp20";
65 marvell,pins = "mpp21";
69 marvell,pins = "mpp26";
73 marvell,pins = "mpp27";
77 marvell,pins = "mpp28";
81 marvell,pins = "mpp29";
85 marvell,pins = "mpp34";
89 marvell,pins = "mpp35";
93 marvell,pins = "mpp36";
97 marvell,pins = "mpp37";
[all …]
Dste-hrefv60plus.dtsi52 pins = "GPIO95_E8";
71 pins = "GPIO6_AF6", "GPIO7_AG5";
75 pins = "GPIO21_AB3";
79 pins = "GPIO64_F3";
87 * (presumably pins are unconnected therefore grounded here,
88 * the "other alt C1" setting enables these pins)
92 pins =
106 pins = "GPIO76_J2";
110 pins = "GPIO216_AG12";
119 pins =
[all …]
Dtegra20-paz00.dts48 nvidia,pins = "ata", "atc", "atd", "ate",
54 nvidia,pins = "atb", "gma", "gme";
58 nvidia,pins = "cdev1";
62 nvidia,pins = "cdev2";
66 nvidia,pins = "crtp";
70 nvidia,pins = "csus";
74 nvidia,pins = "dap1";
78 nvidia,pins = "dap3";
82 nvidia,pins = "dap4";
86 nvidia,pins = "ddc";
[all …]
Datlas6.dtsi374 sirf,pins = "lcd_16bitsgrp";
380 sirf,pins = "lcd_18bitsgrp";
386 sirf,pins = "lcd_24bitsgrp";
392 sirf,pins = "lcdromgrp";
398 sirf,pins = "uart0grp";
404 sirf,pins = "uart0_nostreamctrlgrp";
410 sirf,pins = "uart1grp";
416 sirf,pins = "uart2grp";
422 sirf,pins = "uart2_nostreamctrlgrp";
428 sirf,pins = "spi0grp";
[all …]
Dtegra114-dalmore.dts60 nvidia,pins = "clk1_out_pw4";
67 nvidia,pins = "dap1_din_pn1";
74 nvidia,pins = "dap1_dout_pn2",
83 nvidia,pins = "dap2_din_pa4";
90 nvidia,pins = "dap2_dout_pa5",
99 nvidia,pins = "dap4_din_pp5",
109 nvidia,pins = "dvfs_pwm_px0",
117 nvidia,pins = "ulpi_clk_py0",
132 nvidia,pins = "ulpi_dir_py1",
140 nvidia,pins = "ulpi_stp_py3";
[all …]
Dkirkwood-nsa320.dts44 /* SATA Activity and Present pins are not connected */
46 marvell,pins ;
51 marvell,pins ;
56 marvell,pins = "mpp12";
61 marvell,pins = "mpp13";
66 marvell,pins = "mpp14";
71 marvell,pins = "mpp15";
76 marvell,pins = "mpp16";
81 marvell,pins = "mpp17";
86 marvell,pins = "mpp28";
[all …]
Dprima2.dtsi388 sirf,pins = "lcd_16bitsgrp";
394 sirf,pins = "lcd_18bitsgrp";
400 sirf,pins = "lcd_24bitsgrp";
406 sirf,pins = "lcdromgrp";
412 sirf,pins = "uart0grp";
418 sirf,pins = "uart0_nostreamctrlgrp";
424 sirf,pins = "uart1grp";
430 sirf,pins = "uart2grp";
436 sirf,pins = "uart2_nostreamctrlgrp";
442 sirf,pins = "spi0grp";
[all …]
Dat91sam9rl.dtsi406 atmel,pins =
414 atmel,pins = <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE>;
418 atmel,pins = <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE>;
422 atmel,pins = <AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE>;
426 atmel,pins = <AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>;
430 atmel,pins = <AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_NONE>;
434 atmel,pins = <AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_NONE>;
438 atmel,pins = <AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
444 atmel,pins =
452 atmel,pins =
[all …]
Ddove.dtsi405 marvell,pins = "mpp0";
410 marvell,pins = "mpp1";
415 marvell,pins = "mpp2";
420 marvell,pins = "mpp3";
425 marvell,pins = "mpp4";
430 marvell,pins = "mpp5";
435 marvell,pins = "mpp6";
440 marvell,pins = "mpp7";
445 marvell,pins = "mpp8";
450 marvell,pins = "mpp9";
[all …]
Dtegra124-venice2.dts52 nvidia,pins = "dap_mclk1_pw4";
59 nvidia,pins = "dap1_din_pn1";
66 nvidia,pins = "dap1_dout_pn2",
75 nvidia,pins = "dap2_din_pa4";
82 nvidia,pins = "dap2_dout_pa5",
91 nvidia,pins = "dvfs_pwm_px0",
99 nvidia,pins = "ulpi_clk_py0",
108 nvidia,pins = "ulpi_dir_py1";
115 nvidia,pins = "cam_i2c_scl_pbb1",
125 nvidia,pins = "gen2_i2c_scl_pt5",
[all …]
Dkirkwood-iomega_ix2_200.dts35 marvell,pins = "mpp12";
39 marvell,pins = "mpp14";
43 marvell,pins = "mpp15";
47 marvell,pins = "mpp16";
51 marvell,pins = "mpp35";
55 marvell,pins = "mpp36";
59 marvell,pins = "mpp37";
63 marvell,pins = "mpp38";
67 marvell,pins = "mpp39";
71 marvell,pins = "mpp40";
[all …]
Drk3288.dtsi880 rockchip,pins = <0 0 RK_FUNC_1 &pcfg_pull_none>;
884 rockchip,pins = <0 1 RK_FUNC_1 &pcfg_pull_none>;
888 rockchip,pins = <0 2 RK_FUNC_1 &pcfg_pull_up>;
892 rockchip,pins = <0 3 RK_FUNC_1 &pcfg_pull_up>;
898 rockchip,pins = <0 15 RK_FUNC_1 &pcfg_pull_none>,
905 rockchip,pins = <8 4 RK_FUNC_1 &pcfg_pull_none>,
912 rockchip,pins = <6 9 RK_FUNC_1 &pcfg_pull_none>,
919 rockchip,pins = <2 16 RK_FUNC_1 &pcfg_pull_none>,
926 rockchip,pins = <7 17 RK_FUNC_1 &pcfg_pull_none>,
933 rockchip,pins = <7 19 RK_FUNC_1 &pcfg_pull_none>,
[all …]
Dimx6qdl-aristainetos.dtsi194 fsl,pins = <MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x130b0>;
198 fsl,pins = <MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x130b0>;
202 fsl,pins = <
211 fsl,pins = <
219 fsl,pins = <
228 fsl,pins = <
238 fsl,pins = <
253 fsl,pins = <
260 fsl,pins = <
267 fsl,pins = <
[all …]
Dtegra20-seaboard.dts47 nvidia,pins = "ata";
51 nvidia,pins = "atb", "gma", "gme";
55 nvidia,pins = "atc";
59 nvidia,pins = "atd", "ate", "gmb", "spia",
64 nvidia,pins = "cdev1";
68 nvidia,pins = "cdev2";
72 nvidia,pins = "crtp", "lm1";
76 nvidia,pins = "csus";
80 nvidia,pins = "dap1";
84 nvidia,pins = "dap2";
[all …]
Dat91rm9200.dtsi481 atmel,pins =
489 atmel,pins =
495 atmel,pins =
500 atmel,pins =
507 atmel,pins =
513 atmel,pins =
518 atmel,pins =
523 atmel,pins =
529 atmel,pins =
534 atmel,pins =
[all …]
Dspear310-evb.dts34 st,pins = "gpio0_pin0_grp",
43 st,pins = "i2c0_grp";
47 st,pins = "mii0_grp";
51 st,pins = "ssp0_grp";
55 st,pins = "uart0_grp";
59 st,pins = "emi_cs_0_to_5_grp";
63 st,pins = "fsmc_grp";
67 st,pins = "uart1_grp";
71 st,pins = "uart2_grp";
75 st,pins = "uart3_grp";
[all …]
Dspear320-evb.dts35 st,pins = "i2c0_grp";
39 st,pins = "mii0_grp";
43 st,pins = "ssp0_grp";
47 st,pins = "uart0_grp";
51 st,pins = "sdhci_cd_51_grp";
55 st,pins = "i2s_grp";
59 st,pins = "uart1_grp";
63 st,pins = "uart2_grp";
67 st,pins = "can0_grp";
71 st,pins = "can1_grp";
[all …]
Dtegra20-harmony.dts48 nvidia,pins = "ata";
52 nvidia,pins = "atb", "gma", "gme";
56 nvidia,pins = "atc";
60 nvidia,pins = "atd", "ate", "gmb", "gmd", "gpu",
65 nvidia,pins = "cdev1";
69 nvidia,pins = "cdev2";
73 nvidia,pins = "crtp";
77 nvidia,pins = "csus";
81 nvidia,pins = "dap1";
85 nvidia,pins = "dap2";
[all …]
Dtegra30-apalis.dtsi52 nvidia,pins = "pv2";
60 nvidia,pins = "uart3_rts_n_pc0";
67 nvidia,pins = "uart3_cts_n_pa1";
75 nvidia,pins = "spi2_cs0_n_px3",
85 nvidia,pins = "spi2_cs1_n_pw2";
94 nvidia,pins = "gmi_a16_pj7",
104 nvidia,pins = "spi2_cs2_n_pw3";
113 nvidia,pins = "cam_i2c_scl_pbb1",
125 nvidia,pins = "sdmmc3_clk_pa6",
132 nvidia,pins = "sdmmc3_dat0_pb7",
[all …]
Dvf-colibri.dtsi109 fsl,pins = <
117 fsl,pins = <
126 fsl,pins = <
138 fsl,pins = <
153 fsl,pins = <
160 fsl,pins = <
167 fsl,pins = <
174 fsl,pins = <
181 fsl,pins = <
188 fsl,pins = <
[all …]
Dimx6qdl-tx6.dtsi300 fsl,pins = <
309 fsl,pins = <
318 fsl,pins = <
351 fsl,pins = <
384 fsl,pins = <
395 fsl,pins = <
403 fsl,pins = <
417 fsl,pins = <
423 fsl,pins = <
430 fsl,pins = <
[all …]
Dimx53-tqma53.dtsi79 fsl,pins = <
95 fsl,pins = <
104 fsl,pins = <
111 fsl,pins = <
118 fsl,pins = <
126 fsl,pins = <
134 fsl,pins = <
145 fsl,pins = <
152 fsl,pins = <
167 fsl,pins = <
[all …]
Dat91sam9260.dtsi412 atmel,pins =
420 atmel,pins =
426 atmel,pins =
431 atmel,pins =
436 atmel,pins =
442 atmel,pins =
447 atmel,pins =
454 atmel,pins =
460 atmel,pins =
465 atmel,pins =
[all …]
Dkirkwood-goflexnet.dts23 marvell,pins = "mpp29";
27 marvell,pins = "mpp38";
31 marvell,pins = "mpp39";
35 marvell,pins = "mpp40";
39 marvell,pins = "mpp41";
43 marvell,pins = "mpp42";
47 marvell,pins = "mpp43";
51 marvell,pins = "mpp44";
55 marvell,pins = "mpp45";
59 marvell,pins = "mpp46";
[all …]
Dkirkwood-lsxl.dtsi13 marvell,pins = "mpp10";
17 marvell,pins = "mpp11";
21 marvell,pins = "mpp18";
25 marvell,pins = "mpp19";
29 marvell,pins = "mpp36";
33 marvell,pins = "mpp37";
37 marvell,pins = "mpp38";
41 marvell,pins = "mpp39";
45 marvell,pins = "mpp40";
49 marvell,pins = "mpp41";
[all …]
Dimx6dl-riotboard.dts336 fsl,pins = <
346 fsl,pins = <
355 fsl,pins = <
365 fsl,pins = <
375 fsl,pins = <
399 fsl,pins = <
406 fsl,pins = <
413 fsl,pins = <
420 fsl,pins = <
427 fsl,pins = <
[all …]
Dkirkwood-synology.dtsi30 marvell,pins = "mpp12";
35 marvell,pins = "mpp15";
40 marvell,pins = "mpp16";
45 marvell,pins = "mpp17";
50 marvell,pins = "mpp18";
55 marvell,pins = "mpp20";
60 marvell,pins = "mpp21";
65 marvell,pins = "mpp22";
70 marvell,pins = "mpp23";
75 marvell,pins = "mpp24";
[all …]
Dimx6qdl-rex.dtsi160 fsl,pins = <
167 fsl,pins = <
176 fsl,pins = <
186 fsl,pins = <
196 fsl,pins = <
219 fsl,pins = <
226 fsl,pins = <
233 fsl,pins = <
240 fsl,pins = <
247 fsl,pins = <
[all …]
Dtegra20-colibri-512.dtsi33 nvidia,pins = "cdev1";
39 nvidia,pins = "crtp";
45 nvidia,pins = "dap3";
51 nvidia,pins = "ld0", "ld1", "ld2", "ld3",
61 nvidia,pins = "dte";
67 nvidia,pins = "ata", "atc", "atd", "ate",
75 nvidia,pins = "pta";
81 nvidia,pins = "uac";
87 nvidia,pins = "hdint";
92 nvidia,pins = "rm";
[all …]
Dimx53-tx53.dtsi239 /* pins not in use by any device on the Starterkit board series */
240 fsl,pins = <
295 fsl,pins = <
302 fsl,pins = <
309 fsl,pins = <MX53_PAD_DISP0_DAT0__GPIO4_21 0xe0>; /* Flexcan XCVR enable */
313 fsl,pins = <MX53_PAD_DI0_PIN4__GPIO4_20 0xe0>;
317 fsl,pins = <
328 fsl,pins = <
340 fsl,pins = <
352 fsl,pins = <
[all …]
Dkirkwood-nsa310.dts34 marvell,pins = "mpp12";
39 marvell,pins = "mpp13";
44 marvell,pins = "mpp15";
49 marvell,pins = "mpp16";
54 marvell,pins = "mpp28";
59 marvell,pins = "mpp29";
64 marvell,pins = "mpp41";
69 marvell,pins = "mpp42";
74 marvell,pins = "mpp44";
Domap3-ha-common.dtsi24 pinctrl-single,pins = <
30 pinctrl-single,pins = <
36 pinctrl-single,pins = <
42 pinctrl-single,pins = <
48 pinctrl-single,pins = <
54 pinctrl-single,pins = <
60 pinctrl-single,pins = <
69 pinctrl-single,pins = <
Dspear320-hmi.dts35 st,pins = "i2c0_grp";
39 st,pins = "ssp0_grp";
43 st,pins = "uart0_grp";
47 st,pins = "clcd_grp";
51 st,pins = "fsmc_8bit_grp";
55 st,pins = "sdhci_cd_12_grp";
59 st,pins = "i2s_grp";
63 st,pins = "uart1_grp";
67 st,pins = "uart2_grp";
71 st,pins = "can0_grp";
[all …]
Dspear1340-evb.dts34 st,pins = "pads_as_gpio_grp";
38 st,pins = "fsmc_8bit_grp";
42 st,pins = "uart0_grp";
46 st,pins = "i2c0_grp";
50 st,pins = "i2c1_grp";
54 st,pins = "spdif_in_grp";
58 st,pins = "spdif_out_grp";
62 st,pins = "ssp0_grp", "ssp0_cs1_grp", "ssp0_cs2_grp", "ssp0_cs3_grp";
66 st,pins = "smi_grp";
70 st,pins = "i2s_in_grp", "i2s_out_grp";
[all …]
Dimx6qdl-phytec-pfla02.dtsi213 fsl,pins = <
223 fsl,pins = <
231 fsl,pins = <
252 fsl,pins = <
259 fsl,pins = <
281 fsl,pins = <
288 fsl,pins = <
295 fsl,pins = <
302 fsl,pins = <MX6QDL_PAD_DI0_PIN15__GPIO4_IO17 0x80000000>;
306 fsl,pins = <
[all …]
Dspear1310-evb.dts34 st,pins = "i2c0_grp";
38 st,pins = "i2s0_grp";
42 st,pins = "i2s1_grp";
46 st,pins = "arm_gpio_grp";
50 st,pins = "clcd_grp" , "clcd_high_res";
54 st,pins = "gmii_grp";
58 st,pins = "ssp0_grp";
62 st,pins = "keyboard_6x6_grp";
66 st,pins = "sdhci_grp";
70 st,pins = "smi_2_chips_grp";
[all …]
Dimx6sx-sdb.dtsi315 fsl,pins = <
325 fsl,pins = <
345 fsl,pins = <
351 fsl,pins = <
368 fsl,pins = <
375 fsl,pins = <
382 fsl,pins = <
389 fsl,pins = <
423 fsl,pins = <
429 fsl,pins = <
[all …]
Dkirkwood-iconnect.dts35 marvell,pins = "mpp12";
39 marvell,pins = "mpp35";
43 marvell,pins = "mpp41";
47 marvell,pins = "mpp42";
51 marvell,pins = "mpp43";
55 marvell,pins = "mpp44";
59 marvell,pins = "mpp45";
63 marvell,pins = "mpp46";
67 marvell,pins = "mpp47";
71 marvell,pins = "mpp48";
Dat91sam9g45.dtsi448 atmel,pins = <AT91_PIOD 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
451 atmel,pins = <AT91_PIOD 20 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
454 atmel,pins = <AT91_PIOD 21 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
457 atmel,pins = <AT91_PIOD 22 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
460 atmel,pins = <AT91_PIOD 23 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
463 atmel,pins = <AT91_PIOD 24 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
466 atmel,pins = <AT91_PIOD 25 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
469 atmel,pins = <AT91_PIOD 26 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
472 atmel,pins = <AT91_PIOD 27 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
478 atmel,pins =
[all …]
Dimx27-apf27dev.dts142 fsl,pins = <
150 fsl,pins = <MX27_PAD_CSPI1_SS0__GPIO4_28 0x0>;
154 fsl,pins = <
162 fsl,pins = <
170 fsl,pins = <MX27_PAD_PC_VS1__GPIO6_14 0x0>;
174 fsl,pins = <MX27_PAD_PC_VS2__GPIO6_13 0x0>;
178 fsl,pins = <
210 fsl,pins = <
217 fsl,pins = <
224 fsl,pins = <
[all …]
Dat91sam9261.dtsi304 atmel,pins =
312 atmel,pins =
318 atmel,pins =
323 atmel,pins =
330 atmel,pins =
336 atmel,pins =
341 atmel,pins =
348 atmel,pins =
354 atmel,pins =
359 atmel,pins =
[all …]
Dat91sam9n12.dtsi472 atmel,pins =
480 atmel,pins =
486 atmel,pins =
491 atmel,pins =
498 atmel,pins =
506 atmel,pins =
512 atmel,pins =
517 atmel,pins =
524 atmel,pins =
530 atmel,pins =
[all …]
Dimx51-eukrea-mbimxsd51-baseboard.dts144 fsl,pins = <
154 fsl,pins = <
161 fsl,pins = <
170 fsl,pins = <
181 fsl,pins = <
188 fsl,pins = <
195 fsl,pins = <
202 fsl,pins = <
208 fsl,pins = <
214 fsl,pins = <
[all …]
Dimx53-m53evk.dts165 fsl,pins = <
172 fsl,pins = <
179 fsl,pins = <
188 fsl,pins = <
195 fsl,pins = <
202 fsl,pins = <
213 fsl,pins = <
228 fsl,pins = <
235 fsl,pins = <
242 fsl,pins = <
[all …]
Dimx6qdl-gw51xx.dtsi216 fsl,pins = <
238 fsl,pins = <
245 fsl,pins = <
266 fsl,pins = <
273 fsl,pins = <
280 fsl,pins = <
287 fsl,pins = <
293 fsl,pins = <
299 fsl,pins = <
306 fsl,pins = <
[all …]
Dkirkwood-topkick.dts38 marvell,pins = "mpp21";
43 marvell,pins = "mpp36";
48 marvell,pins = "mpp37";
53 marvell,pins = "mpp38";
58 marvell,pins = "mpp39";
63 marvell,pins = "mpp43";
68 marvell,pins = "mpp44";
73 marvell,pins = "mpp45";
78 marvell,pins = "mpp46";
83 marvell,pins = "mpp48";
Darmada-38x.dtsi236 ge0_rgmii_pins: ge-rgmii-pins-0 {
237 marvell,pins = "mpp6", "mpp7", "mpp8",
244 ge1_rgmii_pins: ge-rgmii-pins-1 {
245 marvell,pins = "mpp21", "mpp27", "mpp28",
252 i2c0_pins: i2c-pins-0 {
253 marvell,pins = "mpp2", "mpp3";
257 mdio_pins: mdio-pins {
258 marvell,pins = "mpp4", "mpp5";
262 ref_clk0_pins: ref-clk-pins-0 {
263 marvell,pins = "mpp45";
[all …]
Dimx6qdl-wandboard.dtsi100 fsl,pins = <
109 fsl,pins = <
131 fsl,pins = <
138 fsl,pins = <
145 fsl,pins = <
151 fsl,pins = <
158 fsl,pins = <
167 fsl,pins = <
173 fsl,pins = <
184 fsl,pins = <
[all …]
Dat91sam9263.dtsi412 atmel,pins =
420 atmel,pins =
426 atmel,pins =
431 atmel,pins =
438 atmel,pins =
444 atmel,pins =
449 atmel,pins =
456 atmel,pins =
462 atmel,pins =
467 atmel,pins =
[all …]
Dstih407-pinctrl.dtsi111 st,pins {
120 st,pins {
129 st,pins {
138 st,pins {
147 st,pins {
156 st,pins {
179 st,pins {
199 st,pins {
207 st,pins {
236 st,pins {
[all …]
Darmada-370.dtsi326 marvell,pins = "mpp33", "mpp34",
332 marvell,pins = "mpp32", "mpp63",
337 spi1_pins: spi1-pins {
338 marvell,pins = "mpp49", "mpp50",
343 uart0_pins: uart0-pins {
344 marvell,pins = "mpp0", "mpp1";
348 uart1_pins: uart1-pins {
349 marvell,pins = "mpp41", "mpp42";
354 marvell,pins = "mpp9", "mpp11", "mpp12",
360 marvell,pins = "mpp47", "mpp48", "mpp49",
[all …]
Dimx6sl-evk.dts277 fsl,pins = <
290 fsl,pins = <
299 fsl,pins = <
308 fsl,pins = <
322 fsl,pins = <
335 fsl,pins = <
343 fsl,pins = <
350 fsl,pins = <
361 fsl,pins = <
394 fsl,pins = <
[all …]
Dkirkwood-mplcec4.dts33 marvell,pins = "mpp7";
38 marvell,pins = "mpp34";
43 marvell,pins = "mpp35";
48 marvell,pins = "mpp40";
53 marvell,pins = "mpp41";
58 marvell,pins = "mpp44";
63 marvell,pins = "mpp45";
68 marvell,pins = "mpp46";
73 marvell,pins = "mpp47";
Dimx6qdl-dfi-fs700-m60.dtsi60 fsl,pins = <
69 fsl,pins = <
90 fsl,pins = <
97 fsl,pins = <
104 fsl,pins = <
110 fsl,pins = <
122 fsl,pins = <
133 fsl,pins = <
148 fsl,pins = <
Dat91sam9x5.dtsi460 atmel,pins =
468 atmel,pins =
474 atmel,pins =
479 atmel,pins =
484 atmel,pins =
491 atmel,pins =
497 atmel,pins =
502 atmel,pins =
507 atmel,pins =
514 atmel,pins =
[all …]
Dimx6qdl-gw52xx.dtsi329 fsl,pins = <
339 fsl,pins = <
361 fsl,pins = <
369 fsl,pins = <
377 fsl,pins = <
398 fsl,pins = <
405 fsl,pins = <
412 fsl,pins = <
419 fsl,pins = <
425 fsl,pins = <
[all …]
Dimx6qdl-sabrelite.dtsi216 fsl,pins = <
223 fsl,pins = <
232 fsl,pins = <
241 fsl,pins = <
264 fsl,pins = <
281 fsl,pins = <
288 fsl,pins = <
295 fsl,pins = <
302 fsl,pins = <
308 fsl,pins = <
[all …]
Dimx6qdl-nitrogen6x.dtsi222 fsl,pins = <
229 fsl,pins = <
238 fsl,pins = <
247 fsl,pins = <
270 fsl,pins = <
287 fsl,pins = <
294 fsl,pins = <
301 fsl,pins = <
308 fsl,pins = <
314 fsl,pins = <
[all …]
Dimx27-eukrea-mbimxsd27-baseboard.dts166 fsl,pins = <
175 fsl,pins = <
181 fsl,pins = <
188 fsl,pins = <
215 fsl,pins = <
221 fsl,pins = <
232 fsl,pins = <
241 fsl,pins = <
247 fsl,pins = <
256 fsl,pins = <
[all …]
Dimx53-smd.dts109 fsl,pins = <
121 fsl,pins = <
129 fsl,pins = <
140 fsl,pins = <
151 fsl,pins = <
166 fsl,pins = <
181 fsl,pins = <
188 fsl,pins = <
195 fsl,pins = <
202 fsl,pins = <
[all …]
Dimx27-eukrea-cpuimx27.dtsi171 fsl,pins = <
194 fsl,pins = <
201 fsl,pins = <
213 fsl,pins = <
219 fsl,pins = <
230 fsl,pins = <
239 fsl,pins = <
245 fsl,pins = <
251 fsl,pins = <
257 fsl,pins = <
[all …]
Dqcom-apq8074-dragonboard.dts29 pins = "gpio83", "gpio84";
36 pins = "gpio45";
40 pins = "gpio46";
44 pins = "gpio47";
48 pins = "gpio48";
Dkirkwood-nsa310a.dts28 marvell,pins = "mpp12";
33 marvell,pins = "mpp13";
38 marvell,pins = "mpp15";
43 marvell,pins = "mpp28";
48 marvell,pins = "mpp29";
53 marvell,pins = "mpp41";
58 marvell,pins = "mpp42";
Dsama5d3.dtsi492 atmel,pins =
496 atmel,pins =
500 atmel,pins =
504 atmel,pins =
508 atmel,pins =
512 atmel,pins =
516 atmel,pins =
520 atmel,pins =
524 atmel,pins =
528 atmel,pins =
[all …]
Dkirkwood-openblocks_a6.dts48 marvell,pins = "mpp10", "mpp11", "mpp15",
54 marvell,pins = "mpp13", "mpp14", "mpp8",
60 marvell,pins = "mpp6";
65 marvell,pins = "mpp20", "mpp21", "mpp22", "mpp23";
70 marvell,pins = "mpp24", "mpp25", "mpp26", "mpp27",
76 marvell,pins = "mpp38";
81 marvell,pins = "mpp39";
86 marvell,pins = "mpp41", "mpp42", "mpp43";
Domap4-var-om44customboard.dtsi67 pinctrl-single,pins = <
76 pinctrl-single,pins = <
85 pinctrl-single,pins = <
91 pinctrl-single,pins = <
124 pinctrl-single,pins = <
132 pinctrl-single,pins = <
139 pinctrl-single,pins = <
151 pinctrl-single,pins = <
158 pinctrl-single,pins = <
164 pinctrl-single,pins = <
[all …]
Dimx6qdl-sabreauto.dtsi218 fsl,pins = <
226 fsl,pins = <
234 fsl,pins = <
240 fsl,pins = <
261 fsl,pins = <
267 fsl,pins = <
289 fsl,pins = <
296 fsl,pins = <
303 fsl,pins = <
309 fsl,pins = <
[all …]
Dimx6qdl-gw53xx.dtsi335 fsl,pins = <
345 fsl,pins = <
366 fsl,pins = <
374 fsl,pins = <
382 fsl,pins = <
403 fsl,pins = <
410 fsl,pins = <
417 fsl,pins = <
424 fsl,pins = <
431 fsl,pins = <
[all …]
Dimx6q-dmo-edmqmx6.dts303 fsl,pins = <
310 fsl,pins = <
317 fsl,pins = <
326 fsl,pins = <
348 fsl,pins = <
355 fsl,pins = <
362 fsl,pins = <
369 fsl,pins = <
375 fsl,pins = <
381 fsl,pins = <MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x80000000>;
[all …]
Dimx6q-tbs2910.dts281 fsl,pins = <
303 fsl,pins = <
309 fsl,pins = <
316 fsl,pins = <
323 fsl,pins = <
330 fsl,pins = <
336 fsl,pins = <
342 fsl,pins = <
352 fsl,pins = <MX6QDL_PAD_GPIO_19__SPDIF_OUT 0x13091
357 fsl,pins = <
[all …]
Dimx51-babbage.dts427 fsl,pins = <
436 fsl,pins = <
442 fsl,pins = <
452 fsl,pins = <
465 fsl,pins = <
478 fsl,pins = <
502 fsl,pins = <
508 fsl,pins = <
514 fsl,pins = <
521 fsl,pins = <
[all …]
Dkirkwood-nsa3x0-common.dtsi21 marvell,pins = "mpp21";
26 marvell,pins = "mpp48";
31 marvell,pins = "mpp36";
36 marvell,pins = "mpp37";
41 marvell,pins = "mpp46";
46 marvell,pins = "mpp39";
51 marvell,pins = "mpp40";
Dtegra30-colibri.dtsi34 nvidia,pins = "pv2";
42 nvidia,pins = "sdmmc3_dat3_pb4";
50 nvidia,pins = "kb_row8_ps0";
62 nvidia,pins = "lcd_m1_pw1";
71 nvidia,pins = "lcd_dc1_pd2";
80 nvidia,pins = "kb_row10_ps2";
86 nvidia,pins = "kb_row11_ps3",
98 nvidia,pins = "ulpi_clk_py0",
107 nvidia,pins = "sdmmc3_dat6_pd3",
116 nvidia,pins = "ulpi_data0_po1",
[all …]
Dimx6qdl-cubox-i.dtsi152 fsl,pins = <
158 fsl,pins = <
165 fsl,pins = <
172 fsl,pins = <
178 fsl,pins = <MX6QDL_PAD_DISP0_DAT8__PWM1_OUT 0x1b0b0>;
182 fsl,pins = <MX6QDL_PAD_GPIO_17__SPDIF_OUT 0x13091>;
186 fsl,pins = <MX6QDL_PAD_GPIO_3__USB_H1_OC 0x1b0b0>;
190 fsl,pins = <MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x4001b0b0>;
198 fsl,pins = <
205 fsl,pins = <MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x4001b0b0>;
[all …]
Dimx6qdl-hummingboard.dtsi164 fsl,pins = <
171 fsl,pins = <
177 fsl,pins = <
183 fsl,pins = <
190 fsl,pins = <
197 fsl,pins = <MX6QDL_PAD_DISP0_DAT8__PWM1_OUT 0x1b0b1>;
201 fsl,pins = <
211 fsl,pins = <MX6QDL_PAD_GPIO_17__SPDIF_OUT 0x13091>;
215 fsl,pins = <MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0>;
223 fsl,pins = <MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x13059>;
[all …]
Dkirkwood-netgear_readynas_nv+_v2.dts46 marvell,pins = "mpp47";
51 marvell,pins = "mpp45";
56 marvell,pins = "mpp13";
61 marvell,pins = "mpp31";
66 marvell,pins = "mpp22";
71 marvell,pins = "mpp20";
76 marvell,pins = "mpp23";
81 marvell,pins = "mpp24";
86 marvell,pins = "mpp29";
91 marvell,pins = "mpp30";
Dimx6q-arm2.dts73 fsl,pins = <
79 fsl,pins = <
100 fsl,pins = <
122 fsl,pins = <
131 fsl,pins = <
138 fsl,pins = <
144 fsl,pins = <
159 fsl,pins = <
166 fsl,pins = <
Dimx6qdl-gw552x.dtsi191 fsl,pins = <
199 fsl,pins = <
220 fsl,pins = <
227 fsl,pins = <
234 fsl,pins = <
241 fsl,pins = <
247 fsl,pins = <
254 fsl,pins = <
261 fsl,pins = <
Dkirkwood-openblocks_a7.dts60 marvell,pins = "mpp10", "mpp11", "mpp15",
66 marvell,pins = "mpp13", "mpp14", "mpp8",
72 marvell,pins = "mpp6";
77 marvell,pins = "mpp44", "mpp45", "mpp46", "mpp47";
88 marvell,pins = "mpp17", "mpp7", "mpp29", "mpp28",
94 marvell,pins = "mpp38";
99 marvell,pins = "mpp39";
104 marvell,pins = "mpp41", "mpp42", "mpp43";
Dste-nomadik-s8815.dts25 /* Hog CD pins */
33 pins = "GPIO111_H21";
38 pins = "GPIO112_J21";
46 pins = "GPIO73_C21", "GPIO74_C20";
54 pins = "GPIO2_C5";
62 pins = "GPIO3_A4";
108 /* Custom board node with GPIO pins to active etc */
Domap3-cm-t3517.dts46 pinctrl-single,pins = <
56 pinctrl-single,pins = <
62 pinctrl-single,pins = <
68 pinctrl-single,pins = <
74 pinctrl-single,pins = <
85 pinctrl-single,pins = <
92 pinctrl-single,pins = <
Dimx6qdl-sabresd.dtsi329 fsl,pins = <
343 fsl,pins = <
352 fsl,pins = <
361 fsl,pins = <
382 fsl,pins = <
390 fsl,pins = <
397 fsl,pins = <
404 fsl,pins = <
411 fsl,pins = <
417 fsl,pins = <
[all …]
Dimx6qdl-gw54xx.dtsi428 fsl,pins = <
438 fsl,pins = <
459 fsl,pins = <
467 fsl,pins = <
475 fsl,pins = <
496 fsl,pins = <
503 fsl,pins = <
510 fsl,pins = <
517 fsl,pins = <
524 fsl,pins = <
[all …]
Darmada-xp-netgear-rn2120.dts292 marvell,pins = "mpp42";
297 marvell,pins = "mpp27";
302 marvell,pins = "mpp41";
307 marvell,pins = "mpp31";
312 marvell,pins = "mpp40";
317 marvell,pins = "mpp44";
322 marvell,pins = "mpp47";
327 marvell,pins = "mpp24";
332 marvell,pins = "mpp25";
337 marvell,pins = "mpp26";
[all …]
Dvf610-twr.dts178 fsl,pins = <
184 fsl,pins = <
193 fsl,pins = <
205 fsl,pins = <
220 fsl,pins = <
234 fsl,pins = <
241 fsl,pins = <
250 fsl,pins = <
262 fsl,pins = <
269 fsl,pins = <
Dkirkwood-dir665.dts50 marvell,pins = "mpp12";
54 marvell,pins = "mpp42";
58 marvell,pins = "mpp43";
62 marvell,pins = "mpp44";
66 marvell,pins = "mpp45";
70 marvell,pins = "mpp47";
74 marvell,pins = "mpp48";
78 marvell,pins = "mpp49";
82 marvell,pins = "mpp28";
86 marvell,pins = "mpp46";
Darmada-xp.dtsi264 ge0_gmii_pins: ge0-gmii-pins {
265 marvell,pins =
275 ge0_rgmii_pins: ge0-rgmii-pins {
276 marvell,pins =
283 ge1_rgmii_pins: ge1-rgmii-pins {
284 marvell,pins =
291 sdio_pins: sdio-pins {
292 marvell,pins = "mpp30", "mpp31", "mpp32",
297 spi0_pins: spi0-pins {
298 marvell,pins = "mpp36", "mpp37",
[all …]
Dkirkwood-netgear_readynas_duo_v2.dts44 marvell,pins = "mpp47";
49 marvell,pins = "mpp45";
54 marvell,pins = "mpp13";
59 marvell,pins = "mpp31";
64 marvell,pins = "mpp38";
69 marvell,pins = "mpp23";
74 marvell,pins = "mpp22";
79 marvell,pins = "mpp29";
84 marvell,pins = "mpp30";
Dimx51-apf51dev.dts126 fsl,pins = <
132 fsl,pins = <
146 fsl,pins = <
154 fsl,pins = <
162 fsl,pins = <
173 fsl,pins = <
184 fsl,pins = <
191 fsl,pins = <
Domap4-var-som-om44.dtsi70 pinctrl-single,pins = <
77 pinctrl-single,pins = <
87 pinctrl-single,pins = <
94 pinctrl-single,pins = <
103 pinctrl-single,pins = <
120 pinctrl-single,pins = <
126 pinctrl-single,pins = <
133 pinctrl-single,pins = <
140 pinctrl-single,pins = <
159 pinctrl-single,pins = <
[all …]
Dimx53-qsb-common.dtsi162 fsl,pins = <
176 fsl,pins = <
182 fsl,pins = <
191 fsl,pins = <
202 fsl,pins = <
217 fsl,pins = <
232 fsl,pins = <
239 fsl,pins = <
246 fsl,pins = <
279 fsl,pins = <
[all …]
Dimx35-eukrea-mbimxsd35-baseboard.dts82 fsl,pins = <
91 fsl,pins = <MX35_PAD_LD19__GPIO3_25 0x80000000>;
95 fsl,pins = <
107 fsl,pins = <MX35_PAD_LD23__GPIO3_29 0x80000000>;
111 fsl,pins = <MX35_PAD_D3_CLS__GPIO1_4 0x80000000>;
115 fsl,pins = <
124 fsl,pins = <
Dkirkwood-sheevaplug-common.dtsi27 marvell,pins = "mpp29";
31 marvell,pins = "mpp46";
35 marvell,pins = "mpp49";
39 marvell,pins = "mpp44";
43 marvell,pins = "mpp47";
Dimx27-phytec-phycore-rdk.dts105 fsl,pins = <
111 fsl,pins = <
117 fsl,pins = <
150 fsl,pins = <
157 fsl,pins = <
163 fsl,pins = <
176 fsl,pins = <
185 fsl,pins = <
194 fsl,pins = <
211 fsl,pins = <
Dzynq-zc702.dts171 pins = "MIO46";
176 pins = "MIO47";
194 pins = "MIO22", "MIO23", "MIO24", "MIO25", "MIO26", "MIO27";
200 pins = "MIO16", "MIO17", "MIO18", "MIO19", "MIO20", "MIO21";
235 pins = "MIO9", "MIO10", "MIO11", "MIO12", "MIO13", "MIO14";
240 pins = "MIO7", "MIO8";
312 pins = "MIO49";
317 pins = "MIO48";
335 pins = "MIO29", "MIO31", "MIO36";
340 pins = "MIO28", "MIO30", "MIO32", "MIO33", "MIO34",
Dam437x-idk-evm.dts117 pinctrl-single,pins = <
123 pinctrl-single,pins = <
130 pinctrl-single,pins = <
137 pinctrl-single,pins = <
144 pinctrl-single,pins = <
151 pinctrl-single,pins = <
163 pinctrl-single,pins = <
175 pinctrl-single,pins = <
181 pinctrl-single,pins = <
198 pinctrl-single,pins = <
[all …]
Dimx6q-gw5400-a.dts404 fsl,pins = <
414 fsl,pins = <
423 fsl,pins = <
444 fsl,pins = <
452 fsl,pins = <
459 fsl,pins = <
466 fsl,pins = <
473 fsl,pins = <
480 fsl,pins = <
486 fsl,pins = <
[all …]
Dkirkwood-ts219-6281.dts16 marvell,pins = "mpp36";
20 marvell,pins = "mpp15";
24 marvell,pins = "mpp16";
29 marvell,pins = "mpp44";
Dimx51-digi-connectcore-jsk.dts65 fsl,pins = <
71 fsl,pins = <
78 fsl,pins = <
85 fsl,pins = <
92 fsl,pins = <
Dimx6sx-sabreauto.dts74 fsl,pins = <
81 fsl,pins = <
98 fsl,pins = <
113 fsl,pins = <
128 fsl,pins = <
141 fsl,pins = <
Dkirkwood-ib62x0.dts23 marvell,pins = "mpp22";
27 marvell,pins = "mpp24";
31 marvell,pins = "mpp25";
35 marvell,pins = "mpp27";
39 marvell,pins = "mpp28";
43 marvell,pins = "mpp29";
Dimx25-eukrea-mbimxsd25-baseboard.dts81 fsl,pins = <
90 fsl,pins = <
101 fsl,pins = <MX25_PAD_VSTBY_ACK__GPIO_3_18 0x80000000>;
105 fsl,pins = <MX25_PAD_POWER_FAIL__GPIO_3_19 0x80000000>;
109 fsl,pins = <
137 fsl,pins = <
146 fsl,pins = <
Dspear300-evb.dts35 st,pins = "i2c0_grp";
39 st,pins = "ssp0_grp";
43 st,pins = "mii0_grp";
47 st,pins = "uart0_grp";
51 st,pins = "clcd_pfmode_grp";
55 st,pins = "sdhci_4bit_grp";
59 st,pins = "gpio1_4_to_7_grp",
Dkirkwood-ts219-6282.dts26 marvell,pins = "mpp36";
30 marvell,pins = "mpp37";
34 marvell,pins = "mpp43";
39 marvell,pins = "mpp44";
Domap4-panda-common.dtsi201 pinctrl-single,pins = <
208 pinctrl-single,pins = <
218 pinctrl-single,pins = <
227 pinctrl-single,pins = <
262 pinctrl-single,pins = <
268 pinctrl-single,pins = <
276 pinctrl-single,pins = <
284 pinctrl-single,pins = <
301 pinctrl-single,pins = <
308 pinctrl-single,pins = <
[all …]
Domap3-zoom3.dts56 pinctrl-single,pins = <
67 pinctrl-single,pins = <
82 pinctrl-single,pins = <
89 pinctrl-single,pins = <
98 pinctrl-single,pins = <
107 pinctrl-single,pins = <
117 pinctrl-single,pins = <
125 pinctrl-single,pins = <
137 pinctrl-single,pins = <
Domap5-uevm.dts153 pinctrl-single,pins = <
159 pinctrl-single,pins = <
169 pinctrl-single,pins = <
178 pinctrl-single,pins = <
187 pinctrl-single,pins = <
194 pinctrl-single,pins = <
201 pinctrl-single,pins = <
210 pinctrl-single,pins = <
219 pinctrl-single,pins = <
230 pinctrl-single,pins = <
[all …]
Dkirkwood-blackarmor-nas220.dts111 marvell,pins = "mpp15";
116 marvell,pins = "mpp16";
121 marvell,pins = "mpp24";
126 marvell,pins = "mpp28";
131 marvell,pins = "mpp29";
136 marvell,pins = "mpp26";
Dimx53-voipac-bsb.dts53 fsl,pins = <
62 fsl,pins = <
70 fsl,pins = <
85 fsl,pins = <
94 fsl,pins = <
105 fsl,pins = <
Dimx6q-gk802.dts85 fsl,pins = <
94 fsl,pins = <
101 fsl,pins = <
108 fsl,pins = <
115 fsl,pins = <
126 fsl,pins = <
Dimx27-phytec-phycard-s-rdk.dts83 fsl,pins = <
90 fsl,pins = <
96 fsl,pins = <
108 fsl,pins = <
117 fsl,pins = <
126 fsl,pins = <
Domap4-duovero.dtsi74 pinctrl-single,pins = <
81 pinctrl-single,pins = <
91 pinctrl-single,pins = <
100 pinctrl-single,pins = <
117 pinctrl-single,pins = <
123 pinctrl-single,pins = <
130 pinctrl-single,pins = <
137 pinctrl-single,pins = <
144 pinctrl-single,pins = <
155 pinctrl-single,pins = <
Dat91sam9x5_usart3.dtsi23 atmel,pins =
29 atmel,pins =
34 atmel,pins =
39 atmel,pins =
Dimx6qdl-udoo.dtsi61 fsl,pins = <
82 fsl,pins = <
89 fsl,pins = <
96 fsl,pins = <
103 fsl,pins = <
Domap3-lilly-a83x.dtsi61 pinctrl-single,pins = <
67 pinctrl-single,pins = <
73 pinctrl-single,pins = <
83 pinctrl-single,pins = <
92 pinctrl-single,pins = <
99 pinctrl-single,pins = <
106 pinctrl-single,pins = <
113 pinctrl-single,pins = <
120 pinctrl-single,pins = <
127 pinctrl-single,pins = <
[all …]
Domap4-sdp.dts214 pinctrl-single,pins = <
223 pinctrl-single,pins = <
232 pinctrl-single,pins = <
239 pinctrl-single,pins = <
246 pinctrl-single,pins = <
256 pinctrl-single,pins = <
265 pinctrl-single,pins = <
274 pinctrl-single,pins = <
283 pinctrl-single,pins = <
292 pinctrl-single,pins = <
[all …]
Dstih416-pinctrl.dtsi111 st,pins {
118 st,pins {
127 st,pins {
143 st,pins {
152 st,pins {
161 st,pins {
170 st,pins {
196 st,pins {
315 st,pins {
323 st,pins {
[all …]
Domap3-igep.dtsi37 pinctrl-single,pins = <
44 pinctrl-single,pins = <
51 pinctrl-single,pins = <
60 pinctrl-single,pins = <
71 pinctrl-single,pins = <
82 pinctrl-single,pins = <
88 pinctrl-single,pins = <
95 pinctrl-single,pins = <
Drk3288-evb.dtsi200 rockchip,pins = <7 2 RK_FUNC_GPIO &pcfg_pull_none>;
206 rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>;
212 rockchip,pins = <RK_GPIO0 4 RK_FUNC_GPIO &pcfg_pull_up>;
222 rockchip,pins = <6 16 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
229 rockchip,pins = <6 20 RK_FUNC_1 &pcfg_pull_none_drv_8ma>;
233 rockchip,pins = <6 21 RK_FUNC_1 &pcfg_pull_up_drv_8ma>;
239 rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>;
245 rockchip,pins = <0 6 RK_FUNC_GPIO &pcfg_pull_none>;
Dste-nomadik-nhk15.dts28 pins = "GPIO76_B20"; // IRQ line
32 pins = "GPIO77_B8"; // reset line
40 pins = "GPIO78_A8"; // IRQ line
44 pins = "GPIO79_C9"; // reset line
91 /* Some pins in alternate functions */
144 /* Custom board node with GPIO pins to active etc */
Dat91sam9x5ek.dtsi105 atmel,pins =
110 atmel,pins =
115 atmel,pins =
122 atmel,pins =
129 atmel,pins =
136 atmel,pins =
Dtwl4030_omap3.dtsi21 pinctrl-single,pins = <
28 * If your board is not using the I2C4 pins with twl4030, then don't include
30 * pins we need to configure I2C4, or else use the legacy sys_nvmode1 and
35 pinctrl-single,pins = <
/linux-4.1.27/drivers/video/fbdev/matrox/
Dmatroxfb_misc.c390 static void get_pins(unsigned char __iomem* pins, struct matrox_bios* bd) { in get_pins() argument
391 unsigned int b0 = readb(pins); in get_pins()
393 if (b0 == 0x2E && readb(pins+1) == 0x41) { in get_pins()
394 unsigned int pins_len = readb(pins+2); in get_pins()
397 unsigned char* dst = bd->pins; in get_pins()
407 cksum += *dst++ = readb(pins+i); in get_pins()
413 } else if (b0 == 0x40 && readb(pins+1) == 0x00) { in get_pins()
415 unsigned char* dst = bd->pins; in get_pins()
420 *dst++ = readb(pins+i); in get_pins()
534 switch (bd->pins[22]) { in parse_pins1()
[all …]
/linux-4.1.27/Documentation/devicetree/bindings/pinctrl/
Dste,abx500.txt27 pins = "GPIO1";
39 pins = "GPIO2";
51 pins = "GPIO3";
63 pins = "GPIO4";
75 pins = "GPIO14";
87 pins = "GPIO15";
99 pins = "GPIO16";
112 pins = "GPIO17","GPIO19","GPIO20";
116 pins = "GPIO18";
128 pins = "GPIO27";
[all …]
Dimg,tz1090-pinctrl.txt14 pin, a group, or a list of pins or groups. This configuration can include the
31 - tz1090,pins : An array of strings. Each string contains the name of a pin or
47 - drive-strength: Integer, control drive strength of pins in mA.
54 Note that many of these properties are only valid for certain specific pins
61 gpio pins:
65 it for all pins in that group).
67 They also all support the some form of muxing. Any pins which are contained
69 supported by the mux group. All other pins can be muxed to the "perip"
72 Different pins in the same mux group cannot be muxed to different functions,
73 however it is possible to mux only a subset of the pins in a mux group to a
[all …]
Dmarvell,mvebu-pinctrl.txt3 The pinctrl driver enables Marvell SoCs to configure the multi-purpose pins
11 A Marvell SoC pin configuration node is a node of a group of pins which can
13 mpp pins or group of pins and a mpp function common to all pins.
20 - marvell,pins: string array of mpp pins or group of pins to be muxed.
22 marvell,pins given in this pin configuration node. The function has to be
23 common for all marvell,pins. Please refer to marvell,<soc>-pinctrl.txt for
43 marvell,pins = "mpp_uart1";
Dmarvell,dove-pinctrl.txt11 Available mpp pins/groups and functions:
16 name pins functions
79 * group "mpp_audio1" allows the following functions and gpio pins:
80 - gpio : gpio on pins 52-57
81 - i2s1/spdifo : audio1 i2s on pins 52-55 and spdifo on 57, no gpios
82 - i2s1 : audio1 i2s on pins 52-55, gpio on pins 56,57
83 - spdifo : spdifo on pin 57, gpio on pins 52-55
84 - twsi : twsi on pins 56,57, gpio on pins 52-55
85 - ssp/spdifo : ssp on pins 52-55, spdifo on pin 57, no gpios
86 - ssp : ssp on pins 52-55, gpio on pins 56,57
[all …]
Dpinctrl-palmas.txt3 The pins of Palmas device can be set on different option and provides
18 list of pins. This configuration can include the mux function to select on
32 - ti,palmas-enable-dvfs1: Enable DVFS1. Configure pins for DVFS1 mode.
35 - ti,palmas-enable-dvfs2: Enable DVFS2. Configure pins for DVFS2 mode.
42 Required: pins
46 Note that many of these properties are only valid for certain specific pins.
47 See the Palmas device datasheet for complete details regarding which pins
63 functions is selected then directly pins register will be written with 0, 1, 2
64 or 3 respectively if it is valid for that pins or list of pins.
77 pins = "gpio0";
[all …]
Dqcom,apq8084-pinctrl.txt52 pin, a group, or a list of pins or groups. This configuration can include the
72 - pins:
75 Definition: List of gpio pins affected by the properties specified in
76 this subnode. Valid pins are:
89 specified pins. Functions are only valid for gpio pins.
117 Definition: The specified pins should be configued as no pull.
122 Definition: The specified pins should be configued as pull down.
127 Definition: The specified pins should be configued as pull up.
132 Definition: The specified pins are configured in output mode, driven
134 Not valid for sdc pins.
[all …]
Dqcom,msm8960-pinctrl.txt52 pin, a group, or a list of pins or groups. This configuration can include the
72 - pins:
75 Definition: List of gpio pins affected by the properties specified in
76 this subnode. Valid pins are:
89 specified pins. Functions are only valid for gpio pins.
119 Definition: The specified pins should be configued as no pull.
124 Definition: The specified pins should be configued as pull down.
129 Definition: The specified pins should be configued as pull up.
134 Definition: The specified pins are configured in output mode, driven
136 Not valid for sdc pins.
[all …]
Dqcom,msm8916-pinctrl.txt52 pin, a group, or a list of pins or groups. This configuration can include the
72 - pins:
75 Definition: List of gpio pins affected by the properties specified in
76 this subnode. Valid pins are:
94 specified pins. Functions are only valid for gpio pins.
125 Definition: The specified pins should be configued as no pull.
130 Definition: The specified pins should be configued as pull down.
135 Definition: The specified pins should be configued as pull up.
140 Definition: The specified pins are configured in output mode, driven
142 Not valid for sdc pins.
[all …]
Dqcom,pmic-gpio.txt51 pin or a list of pins. This configuration can include the
70 - pins:
73 Definition: List of gpio pins affected by the properties specified in
74 this subnode. Valid pins are:
88 specified pins. Valid values are:
101 Definition: The specified pins should be configured as no pull.
106 Definition: The specified pins should be configured as pull down.
111 Definition: The specified pins should be configured as pull up.
129 Definition: The specified pins will put in high-Z mode and disabled.
134 Definition: The specified pins are put in input mode.
[all …]
Dallwinner,sunxi-pinctrl.txt3 The pins controlled by sunXi pin controller are organized in banks,
4 each bank has 32 pins. Each pin has 7 multiplexing functions, with
6 the pins includes drive strength and pull-up.
27 pins it needs, and how they should be configured, with regard to muxer
33 - allwinner,pins: List of strings containing the pin name.
34 - allwinner,function: Function to mux the pins listed above to.
56 allwinner,pins = "PE10", "PE11";
63 allwinner,pins = "PG3", "PG4";
Dimg,tz1090-pdc-pinctrl.txt14 pin, a group, or a list of pins or groups. This configuration can include the
31 - tz1090,pins : An array of strings. Each string contains the name of a pin or
47 - drive-strength: Integer, control drive strength of pins in mA.
55 Note that many of these properties are only valid for certain specific pins
62 pins:
66 it for all gpio pins in that group).
75 pins: gpio0.
78 pins: gpio1.
87 pins: gpio0, gpio1, sys_wake0, sys_wake1, sys_wake2, ir_data,
106 tz1090,pins = "sys_wake0",
[all …]
Dqcom,pmic-mpp.txt47 pin or a list of pins. This configuration can include the
65 - pins:
68 Definition: List of MPP pins affected by the properties specified in
69 this subnode. Valid pins are:
79 specified pins. Valid values are:
90 Definition: The specified pins should be configured as no pull.
95 Definition: The specified pins should be configured as pull up.
104 Definition: The specified pins will put in high-Z mode and disabled.
109 Definition: The specified pins are put in input mode, i.e. their input
115 Definition: The specified pins are configured in output mode, driven
[all …]
Dfsl,mxs-pinctrl.txt3 The pins controlled by mxs pin controller are organized in banks, each bank
4 has 32 pins. Each pin has 4 multiplexing functions, and generally, the 4th
5 function is GPIO. The configuration on the pins includes drive strength,
18 a group of pins, and only affects those parameters that are explicitly listed.
26 One is to set up a group of pins for a function, both mux selection and pin
28 one is to adjust the pin configuration for some particular pins that need a
33 means a group of pins put together for particular peripheral to work in
35 group node should include all the pins needed for one function rather than
36 having these pins defined in several group nodes. It also means each of
39 there to adjust configurations for some pins in the group.
[all …]
Dbrcm,bcm11351-pinctrl.txt38 arbitrary number of pins. The name of the pin group node is optional and not
50 properties. A list of pins and their types is provided below.
52 Required Properties (applicable to all pins):
54 - pins: Multiple strings. Specifies the name(s) of one or more pins to
57 Optional Properties (for standard pins):
83 Optional Properties (for I2C pins):
89 in parallel for I2C pins, so the valid values
107 Optional Properties (for HDMI pins):
129 pins = "std_pin1";
137 // group node defining 2 I2C pins
[all …]
Dste,nomadik.txt14 pin, a group, or a list of pins or groups. This configuration can include the
31 - pins: A string array describing the pins affected by the configuration
106 pins = "u0_a_1";
111 pins = "GPIO0", "GPIO2";
116 pins = "GPIO1", "GPIO3";
122 pins = "GPIO0", "GPIO2";
126 pins = "GPIO1";
130 pins = "GPIO3";
Dsamsung-pinctrl.txt4 controller. It controls the input/output settings on the available pads/pins
56 list of pins is specified using the property name "samsung,pins". There
58 limit on the count of pins that can be specified. The pins are specified
60 an example, the pins in GPA0 bank of the pin controller can be represented
65 The pin function selection that should be applied on the pins listed in the
67 of this property that should be applied to each of the pins listed in the
68 "samsung,pins" property should be picked from the hardware manual of the SoC
70 no specific function selection is desired for the pins listed in the child
75 configuration that should be applied on all the pins listed in the
76 "samsung,pins" property of the child node. The following pin configuration
[all …]
Dqcom,apq8064-pinctrl.txt23 pin, a group, or a list of pins or groups. This configuration can include the
40 pins, function, bias-disable, bias-pull-down, bias-pull,up, drive-strength,
43 Non-empty subnodes must specify the 'pins' property.
45 Valid values for pins are:
72 pins = "gpio51", "gpio52";
77 pins = "gpio51";
83 pins = "gpio52";
Dqcom,msm8974-pinctrl.txt23 pin, a group, or a list of pins or groups. This configuration can include the
39 pins, function, bias-disable, bias-pull-down, bias-pull,up, drive-strength.
41 Non-empty subnodes must specify the 'pins' property.
42 Note that not all properties are valid for all pins.
45 Valid values for pins are:
96 pins = "gpio4", "gpio5";
101 pins = "gpio4";
107 pins = "gpio5";
/linux-4.1.27/arch/arm64/boot/dts/exynos/
Dexynos7-pinctrl.dtsi177 samsung,pins = "gpb0-1", "gpb0-0";
184 samsung,pins = "gpb0-3", "gpb0-2";
191 samsung,pins = "gpd0-3", "gpd0-2";
198 samsung,pins = "gpd0-0", "gpd0-1";
205 samsung,pins = "gpd0-2", "gpd0-3";
212 samsung,pins = "gpd1-4", "gpd1-5";
219 samsung,pins = "gpd1-3", "gpd1-2";
226 samsung,pins = "gpd1-0", "gpd1-1";
233 samsung,pins = "gpd1-2", "gpd1-3";
240 samsung,pins = "gpd2-1", "gpd2-0";
[all …]
/linux-4.1.27/arch/cris/arch-v32/mach-fs/
Dpinmux.c24 static char pins[PORTS][PORT_PINS]; variable
35 if ((pins[port][i] != pinmux_none) in __crisv32_pinmux_alloc()
36 && (pins[port][i] != pinmux_gpio) in __crisv32_pinmux_alloc()
37 && (pins[port][i] != mode)) { in __crisv32_pinmux_alloc()
46 pins[port][i] = mode; in __crisv32_pinmux_alloc()
94 char saved[sizeof pins]; in crisv32_pinmux_alloc_fixed()
100 memcpy(saved, pins, sizeof pins); in crisv32_pinmux_alloc_fixed()
168 memcpy(pins, saved, sizeof pins); in crisv32_pinmux_alloc_fixed()
182 if (pins[port][i] == pinmux_gpio) in crisv32_pinmux_set()
184 else if (pins[port][i] == pinmux_iop) in crisv32_pinmux_set()
[all …]
/linux-4.1.27/arch/cris/arch-v32/mach-a3/
Dpinmux.c26 static char pins[PINS]; variable
61 if ((pins[port * PORT_PINS + i] != pinmux_none) && in crisv32_pinmux_alloc()
62 (pins[port * PORT_PINS + i] != pinmux_gpio) && in crisv32_pinmux_alloc()
63 (pins[port * PORT_PINS + i] != mode)) { in crisv32_pinmux_alloc()
73 pins[port * PORT_PINS + i] = mode; in crisv32_pinmux_alloc()
86 char saved[sizeof pins]; in crisv32_pinmux_alloc_fixed()
94 memcpy(saved, pins, sizeof pins); in crisv32_pinmux_alloc_fixed()
206 memcpy(pins, saved, sizeof pins); in crisv32_pinmux_alloc_fixed()
222 if (pins[pin] == pinmux_gpio) in crisv32_pinmux_set()
224 else if (pins[pin] == pinmux_iop) in crisv32_pinmux_set()
[all …]
/linux-4.1.27/drivers/pinctrl/spear/
Dpinctrl-spear1340.c262 .pins = pads_as_gpio_pins,
295 .pins = fsmc_8bit_pins,
324 .pins = fsmc_16bit_pins,
355 .pins = fsmc_pnor_pins,
393 .pins = keyboard_row_col_pins,
422 .pins = keyboard_col5_pins,
455 .pins = spdif_in_pins,
491 .pins = spdif_out_pins,
531 .pins = gpt_0_1_pins,
567 .pins = pwm0_pins,
[all …]
Dpinctrl-spear3xx.c41 .pins = firda_pins,
74 .pins = i2c_pins,
107 .pins = ssp_cs_pins,
140 .pins = ssp_pins,
174 .pins = mii_pins,
207 .pins = gpio0_pin0_pins,
233 .pins = gpio0_pin1_pins,
259 .pins = gpio0_pin2_pins,
285 .pins = gpio0_pin3_pins,
311 .pins = gpio0_pin4_pins,
[all …]
Dpinctrl-spear320.c502 .pins = clcd_pins,
585 .pins = emi_pins,
631 .pins = fsmc_8bit_pins,
678 .pins = fsmc_16bit_pins,
724 .pins = spp_pins,
769 .pins = sdhci_led_pins,
872 .pins = sdhci_cd_12_pins,
878 .pins = sdhci_cd_51_pins,
934 .pins = i2s_pins,
980 .pins = uart1_pins,
[all …]
Dpinctrl-spear310.c43 .pins = emi_cs_0_to_5_pins,
75 .pins = uart1_pins,
107 .pins = uart2_pins,
139 .pins = uart3_pins,
171 .pins = uart4_pins,
203 .pins = uart5_pins,
235 .pins = fsmc_pins,
267 .pins = rs485_0_pins,
299 .pins = rs485_1_pins,
331 .pins = tdm_pins,
Dpinctrl-spear1310.c260 .pins = i2c0_pins,
296 .pins = ssp0_pins,
325 .pins = ssp0_cs0_pins,
354 .pins = ssp0_cs1_2_pins,
391 .pins = i2s0_pins,
427 .pins = i2s1_pins,
465 .pins = clcd_pins,
494 .pins = clcd_high_res_pins,
538 .pins = arm_gpio_pins,
574 .pins = smi_2_chips_pins,
[all …]
Dpinctrl-spear300.c181 .pins = fsmc_2chips_pins,
208 .pins = fsmc_4chips_pins,
243 .pins = clcd_lcdmode_pins,
269 .pins = clcd_pfmode_pins,
307 .pins = tdm_pins,
343 .pins = i2c_clk_pins,
376 .pins = caml_pins,
402 .pins = camu_pins,
436 .pins = dac_pins,
472 .pins = i2s_pins,
[all …]
/linux-4.1.27/arch/arm/mach-omap1/
Dusb.c76 if (config->pins[0] > 2) /* alt pingroup 2 */ in omap_otg_init()
78 syscon |= config->usb0_init(config->pins[0], is_usb0_device(config)); in omap_otg_init()
79 syscon |= config->usb1_init(config->pins[1]); in omap_otg_init()
80 syscon |= config->usb2_init(config->pins[2], alt_pingroup); in omap_otg_init()
98 printk(", usb2 alt %d wires", config->pins[2]); in omap_otg_init()
99 else if (config->pins[0]) in omap_otg_init()
100 printk(", usb0 %d wires%s", config->pins[0], in omap_otg_init()
102 if (config->pins[1]) in omap_otg_init()
103 printk(", usb1 %d wires", config->pins[1]); in omap_otg_init()
104 if (!alt_pingroup && config->pins[2]) in omap_otg_init()
[all …]
/linux-4.1.27/drivers/pinctrl/samsung/
Dpinctrl-exynos.h53 #define EXYNOS_PIN_BANK_EINTN(pins, reg, id) \ argument
57 .nr_pins = pins, \
62 #define EXYNOS_PIN_BANK_EINTG(pins, reg, id, offs) \ argument
66 .nr_pins = pins, \
72 #define EXYNOS_PIN_BANK_EINTW(pins, reg, id, offs) \ argument
76 .nr_pins = pins, \
Dpinctrl-s3c64xx.c101 #define PIN_BANK_4BIT(pins, reg, id) \ argument
105 .nr_pins = pins, \
110 #define PIN_BANK_4BIT_EINTG(pins, reg, id, eoffs) \ argument
114 .nr_pins = pins, \
117 .eint_mask = (1 << (pins)) - 1, \
122 #define PIN_BANK_4BIT_EINTW(pins, reg, id, eoffs, emask) \ argument
126 .nr_pins = pins, \
134 #define PIN_BANK_4BIT2_EINTG(pins, reg, id, eoffs) \ argument
138 .nr_pins = pins, \
141 .eint_mask = (1 << (pins)) - 1, \
[all …]
/linux-4.1.27/drivers/staging/panel/
Dpanel.c271 } pins; member
810 if (lcd.pins.bl == PIN_NONE) in lcd_backlight()
1477 lcd.pins.e = PIN_STROBE; in lcd_init()
1478 lcd.pins.rs = PIN_AUTOLF; in lcd_init()
1489 lcd.pins.bl = PIN_AUTOLF; in lcd_init()
1490 lcd.pins.cl = PIN_STROBE; in lcd_init()
1491 lcd.pins.da = PIN_D0; in lcd_init()
1502 lcd.pins.e = PIN_AUTOLF; in lcd_init()
1503 lcd.pins.rs = PIN_SELECP; in lcd_init()
1504 lcd.pins.rw = PIN_INITP; in lcd_init()
[all …]
/linux-4.1.27/sound/soc/omap/
Dams-delta.c104 unsigned short pins; in ams_delta_set_audio_mode() local
117 pins = ams_delta_audio_mode_pins[ucontrol->value.enumerated.item[0]]; in ams_delta_set_audio_mode()
120 pin = !!(pins & (1 << AMS_DELTA_MOUTHPIECE)); in ams_delta_set_audio_mode()
129 pin = !!(pins & (1 << AMS_DELTA_EARPIECE)); in ams_delta_set_audio_mode()
137 pin = !!(pins & (1 << AMS_DELTA_MICROPHONE)); in ams_delta_set_audio_mode()
145 pin = !!(pins & (1 << AMS_DELTA_SPEAKER)); in ams_delta_set_audio_mode()
153 pin = !!(pins & (1 << AMS_DELTA_AGC)); in ams_delta_set_audio_mode()
176 unsigned short pins, mode; in ams_delta_get_audio_mode() local
178 pins = ((snd_soc_dapm_get_pin_status(dapm, "Mouthpiece") << in ams_delta_get_audio_mode()
182 if (pins) in ams_delta_get_audio_mode()
[all …]
/linux-4.1.27/Documentation/devicetree/bindings/clock/
Dclk-palmas-clk32kg-clocks.txt3 Palmas device has two clock output pins for 32KHz, KG and KG_AUDIO.
13 - ti,external-sleep-control: The external enable input pins controlled the
14 enable/disable of clocks. The external enable input pins ENABLE1,
15 ENABLE2 and NSLEEP. The valid values for the external pins are:
20 via register access and these pins do not have any control.
21 The macros of external control pins for DTS is defined at
/linux-4.1.27/drivers/pinctrl/
Dpinctrl-amd.h78 const unsigned *pins; member
231 .pins = i2c0_pins,
236 .pins = i2c1_pins,
241 .pins = i2c2_pins,
246 .pins = i2c3_pins,
251 .pins = uart0_pins,
256 .pins = uart1_pins,
Dcore.c153 pin = pctldev->desc->pins[i].number; in pin_get_from_name()
207 const struct pinctrl_pin_desc *pins, in pinctrl_free_pindescs() argument
216 pins[i].number); in pinctrl_free_pindescs()
219 pins[i].number); in pinctrl_free_pindescs()
267 struct pinctrl_pin_desc const *pins, in pinctrl_register_pins() argument
275 pins[i].number, pins[i].name); in pinctrl_register_pins()
300 if (range->pins) in gpio_to_pin()
301 return range->pins[offset]; in gpio_to_pin()
466 const unsigned **pins, unsigned *num_pins) in pinctrl_get_group_pins() argument
478 return pctlops->get_group_pins(pctldev, gs, pins, num_pins); in pinctrl_get_group_pins()
[all …]
Dpinctrl-lantiq.c38 const unsigned **pins, in ltq_get_group_pins() argument
44 *pins = info->grps[selector].pins; in ltq_get_group_pins()
73 struct property *pins = of_find_property(np, "lantiq,pins", NULL); in ltq_pinctrl_dt_subnode_to_map() local
82 if (!pins && !groups) { in ltq_pinctrl_dt_subnode_to_map()
88 if (pins && groups) { in ltq_pinctrl_dt_subnode_to_map()
244 pin = match_mfp(info, grp->pins[i]); in match_group_mux()
247 grp->pins[i]); in match_group_mux()
275 pin = match_mfp(info, pin_grp->pins[i]); in ltq_pmx_set()
278 pin_grp->pins[i]); in ltq_pmx_set()
Dpinmux.c395 const unsigned *pins = NULL; in pinmux_enable_setting() local
402 &pins, &num_pins); in pinmux_enable_setting()
418 ret = pin_request(pctldev, pins[i], setting->dev_name, NULL); in pinmux_enable_setting()
423 desc = pin_desc_get(pctldev, pins[i]); in pinmux_enable_setting()
430 pins[i], pname, gname, in pinmux_enable_setting()
438 desc = pin_desc_get(pctldev, pins[i]); in pinmux_enable_setting()
442 pins[i]); in pinmux_enable_setting()
458 desc = pin_desc_get(pctldev, pins[i]); in pinmux_enable_setting()
465 pin_free(pctldev, pins[i], NULL); in pinmux_enable_setting()
475 const unsigned *pins = NULL; in pinmux_disable_setting() local
[all …]
Dpinctrl-adi2.h22 const unsigned *pins; member
30 .pins = p, \
69 const struct pinctrl_pin_desc *pins; member
/linux-4.1.27/drivers/pinctrl/freescale/
Dpinctrl-imx1-core.c195 const unsigned int **pins, in imx1_get_group_pins() argument
204 *pins = info->groups[selector].pin_ids; in imx1_get_group_pins()
273 pin_get_name(pctldev, grp->pins[i].pin_id); in imx1_dt_node_to_map()
274 new_map[j].data.configs.configs = &grp->pins[i].config; in imx1_dt_node_to_map()
306 const struct imx1_pin *pins; in imx1_pmx_set() local
314 pins = info->groups[group].pins; in imx1_pmx_set()
317 WARN_ON(!pins || !npins); in imx1_pmx_set()
323 unsigned int mux = pins[i].mux_id; in imx1_pmx_set()
324 unsigned int pin_id = pins[i].pin_id; in imx1_pmx_set()
443 name = pin_get_name(pctldev, grp->pins[i].pin_id); in imx1_pinconf_group_dbg_show()
[all …]
Dpinctrl-imx.c80 const unsigned **pins, in imx_get_group_pins() argument
89 *pins = info->groups[selector].pin_ids; in imx_get_group_pins()
125 if (!(grp->pins[i].config & IMX_NO_PAD_CTL)) in imx_dt_node_to_map()
150 if (!(grp->pins[i].config & IMX_NO_PAD_CTL)) { in imx_dt_node_to_map()
153 pin_get_name(pctldev, grp->pins[i].pin); in imx_dt_node_to_map()
154 new_map[j].data.configs.configs = &grp->pins[i].config; in imx_dt_node_to_map()
203 struct imx_pin *pin = &grp->pins[i]; in imx_pmx_set()
209 info->pins[pin_id].name); in imx_pmx_set()
320 imx_pin = &grp->pins[pin]; in imx_pmx_gpio_request_enable()
385 info->pins[pin_id].name); in imx_pinconf_get()
[all …]
Dpinctrl-mxs.c52 const unsigned **pins, unsigned *num_pins) in mxs_get_group_pins() argument
56 *pins = d->soc->groups[group].pins; in mxs_get_group_pins()
209 bank = PINID_TO_BANK(g->pins[i]); in mxs_pinctrl_set_mux()
210 pin = PINID_TO_PIN(g->pins[i]); in mxs_pinctrl_set_mux()
273 bank = PINID_TO_BANK(g->pins[i]); in mxs_pinconf_group_set()
274 pin = PINID_TO_PIN(g->pins[i]); in mxs_pinconf_group_set()
373 g->pins = devm_kzalloc(&pdev->dev, g->npins * sizeof(*g->pins), in mxs_pinctrl_parse_group()
375 if (!g->pins) in mxs_pinctrl_parse_group()
383 of_property_read_u32_array(np, propname, g->pins, g->npins); in mxs_pinctrl_parse_group()
385 g->muxsel[i] = MUXID_TO_MUXSEL(g->pins[i]); in mxs_pinctrl_parse_group()
[all …]
/linux-4.1.27/Documentation/devicetree/bindings/input/
Dnvidia,tegra20-kbc.txt2 The key controller has maximum 24 pins to make matrix keypad. Any pin
4 and maximum row pins can be 16 for Tegra20/Tegra30.
10 - nvidia,kbc-row-pins: The KBC pins which are configured as row. This is an
12 - nvidia,kbc-col-pins: The KBC pins which are configured as column. This is an
45 nvidia,kbc-row-pins = <0 1 2>; /* pin 0, 1, 2 as rows */
46 nvidia,kbc-col-pins = <11 12 13>; /* pin 11, 12, 13 as columns */
/linux-4.1.27/drivers/pinctrl/sh-pfc/
Dpinctrl.c41 struct pinctrl_pin_desc *pins; member
61 const unsigned **pins, unsigned *num_pins) in sh_pfc_get_group_pins() argument
65 *pins = pmx->pfc->info->groups[selector].pins; in sh_pfc_get_group_pins()
328 int idx = sh_pfc_get_pin_index(pfc, grp->pins[i]); in sh_pfc_func_set_mux()
373 const struct sh_pfc_pin *pin = &pfc->info->pins[idx]; in sh_pfc_gpio_request_enable()
413 const struct sh_pfc_pin *pin = &pfc->info->pins[idx]; in sh_pfc_gpio_set_direction()
456 const struct sh_pfc_pin *pin = &pfc->info->pins[idx]; in sh_pfc_pinconf_validate()
550 const unsigned int *pins; in sh_pfc_pinconf_group_set() local
554 pins = pmx->pfc->info->groups[group].pins; in sh_pfc_pinconf_group_set()
558 sh_pfc_pinconf_set(pctldev, pins[i], configs, num_configs); in sh_pfc_pinconf_group_set()
[all …]
/linux-4.1.27/sound/soc/
Dsoc-jack.c40 struct snd_soc_jack *jack, struct snd_soc_jack_pin *pins, in snd_soc_card_jack_new() argument
47 INIT_LIST_HEAD(&jack->pins); in snd_soc_card_jack_new()
56 return snd_soc_jack_add_pins(jack, num_pins, pins); in snd_soc_card_jack_new()
97 list_for_each_entry(pin, &jack->pins, list) { in snd_soc_jack_report()
182 struct snd_soc_jack_pin *pins) in snd_soc_jack_add_pins() argument
187 if (!pins[i].pin) { in snd_soc_jack_add_pins()
192 if (!pins[i].mask) { in snd_soc_jack_add_pins()
194 " (%s)\n", i, pins[i].pin); in snd_soc_jack_add_pins()
198 INIT_LIST_HEAD(&pins[i].list); in snd_soc_jack_add_pins()
199 list_add(&(pins[i].list), &jack->pins); in snd_soc_jack_add_pins()
/linux-4.1.27/Documentation/
Dpinctrl.txt6 - Enumerating and naming controllable pins
8 - Multiplexing of pins, pads, fingers (etc) see below for details
10 - Configuration of pins, pads, fingers (etc), such as software-controlled
11 biasing and driving mode specific pins, such as pull-up/down, open drain,
21 set drive strength, etc. for individual pins or groups of pins.
34 describing the pins handled by this specific pin controller.
56 To register a pin controller and name all the pins on this package we can do
73 .pins = foo_pins,
95 the pins from 0 in the upper left corner to 63 in the lower right corner.
102 For a padring with 467 pads, as opposed to actual pins, I used an enumeration
[all …]
/linux-4.1.27/sound/pci/hda/
Dhda_auto_parser.c49 static void sort_pins_by_sequence(hda_nid_t *pins, struct auto_out_pin *list, in sort_pins_by_sequence() argument
55 pins[i] = list[i].pin; in sort_pins_by_sequence()
91 static void reorder_outputs(unsigned int nums, hda_nid_t *pins) in reorder_outputs() argument
98 nid = pins[1]; in reorder_outputs()
99 pins[1] = pins[2]; in reorder_outputs()
100 pins[2] = nid; in reorder_outputs()
600 static const char *check_output_sfx(hda_nid_t nid, const hda_nid_t *pins, in check_output_sfx() argument
608 i = find_idx_in_nid_list(nid, pins, num_pins); in check_output_sfx()
637 const hda_nid_t *pins, int num_pins) in get_hp_label_index() argument
643 i = find_idx_in_nid_list(nid, pins, num_pins); in get_hp_label_index()
[all …]
/linux-4.1.27/drivers/pinctrl/meson/
Dpinctrl-meson.h32 const unsigned int *pins; member
140 const struct pinctrl_pin_desc *pins; member
163 .pins = grp ## _pins, \
173 .pins = (const unsigned int[]){ PIN(gpio, b) }, \
181 .pins = grp ## _pins, \
/linux-4.1.27/arch/arm/mach-davinci/
Dmux.c104 int davinci_cfg_reg_list(const short pins[]) in davinci_cfg_reg_list() argument
108 if (pins) in davinci_cfg_reg_list()
109 for (i = 0; pins[i] >= 0; i++) { in davinci_cfg_reg_list()
110 error = davinci_cfg_reg(pins[i]); in davinci_cfg_reg_list()
/linux-4.1.27/drivers/staging/iio/resolver/
Dad2s1200.c109 unsigned short *pins = spi->dev.platform_data; in ad2s1200_probe() local
112 ret = devm_gpio_request_one(&spi->dev, pins[pn], GPIOF_DIR_OUT, in ad2s1200_probe()
116 pins[pn]); in ad2s1200_probe()
127 st->sample = pins[0]; in ad2s1200_probe()
128 st->rdvel = pins[1]; in ad2s1200_probe()
/linux-4.1.27/arch/arm/mach-imx/
Dmach-mx31lilly.c120 int pins[] = { in usbh1_init() local
130 mxc_iomux_setup_multiple_pins(pins, ARRAY_SIZE(pins), "USB H1"); in usbh1_init()
150 int pins[] = { in usbh2_init() local
159 mxc_iomux_setup_multiple_pins(pins, ARRAY_SIZE(pins), "USB H2"); in usbh2_init()

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