Searched refs:pll_dw0 (Results 1 – 1 of 1) sorted by relevance
7016 u32 cmn_dw13, pll_dw0, pll_dw1, pll_dw2; in chv_crtc_clock_get() local7021 pll_dw0 = vlv_dpio_read(dev_priv, pipe, CHV_PLL_DW0(port)); in chv_crtc_clock_get()7027 clock.m2 = ((pll_dw0 & 0xff) << 22) | (pll_dw2 & 0x3fffff); in chv_crtc_clock_get()