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Searched refs:pll_val (Results 1 – 1 of 1) sorted by relevance

/linux-4.1.27/drivers/clk/
Dclk-vt8500.c544 u32 pll_val; in vtwm_pll_set_rate() local
552 pll_val = VT8500_BITS_TO_VAL(mul, div1); in vtwm_pll_set_rate()
556 pll_val = WM8650_BITS_TO_VAL(mul, div1, div2); in vtwm_pll_set_rate()
560 pll_val = WM8750_BITS_TO_VAL(filter, mul, div1, div2); in vtwm_pll_set_rate()
564 pll_val = WM8850_BITS_TO_VAL(mul, div1, div2); in vtwm_pll_set_rate()
574 writel(pll_val, pll->reg); in vtwm_pll_set_rate()
617 u32 pll_val = readl(pll->reg); in vtwm_pll_recalc_rate() local
622 pll_freq = parent_rate * VT8500_PLL_MUL(pll_val); in vtwm_pll_recalc_rate()
623 pll_freq /= VT8500_PLL_DIV(pll_val); in vtwm_pll_recalc_rate()
626 pll_freq = parent_rate * WM8650_PLL_MUL(pll_val); in vtwm_pll_recalc_rate()
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