Searched refs:pllclk (Results 1 – 3 of 3) sorted by relevance
127 unsigned int pllclk, ahbclk, apbclk, val; in nuc900_set_clkval() local129 pllclk = 0; in nuc900_set_clkval()135 pllclk = PLL_66MHZ; in nuc900_set_clkval()141 pllclk = PLL_100MHZ; in nuc900_set_clkval()147 pllclk = PLL_120MHZ; in nuc900_set_clkval()153 pllclk = PLL_166MHZ; in nuc900_set_clkval()159 pllclk = PLL_200MHZ; in nuc900_set_clkval()165 __raw_writel(pllclk, REG_PLLCON0); in nuc900_set_clkval()
74 struct xgene_clk_pll *pllclk = to_xgene_clk_pll(hw); in xgene_clk_pll_is_enabled() local77 data = xgene_clk_read(pllclk->reg + pllclk->pll_offset); in xgene_clk_pll_is_enabled()78 pr_debug("%s pll %s\n", pllclk->name, in xgene_clk_pll_is_enabled()87 struct xgene_clk_pll *pllclk = to_xgene_clk_pll(hw); in xgene_clk_pll_recalc_rate() local95 pll = xgene_clk_read(pllclk->reg + pllclk->pll_offset); in xgene_clk_pll_recalc_rate()97 if (pllclk->type == PLL_TYPE_PCP) { in xgene_clk_pll_recalc_rate()116 pr_debug("%s pll recalc rate %ld parent %ld\n", pllclk->name, in xgene_clk_pll_recalc_rate()
1118 struct clk *pllclk = &pll0_clk; in da850_set_armrate() local1120 return clk_set_rate(pllclk, index); in da850_set_armrate()