Searched refs:plx_regbase (Results 1 – 2 of 2) sorted by relevance
167 void __iomem *plx_regbase; /* PLX configuration base address */ member376 writel(0x00, dev_private->plx_regbase + PLX9052_INTCSR); in me2600_xilinx_download()416 value = readl(dev_private->plx_regbase + PLX9052_INTCSR); in me2600_xilinx_download()419 writel(0x00, dev_private->plx_regbase + PLX9052_INTCSR); in me2600_xilinx_download()431 dev_private->plx_regbase + PLX9052_INTCSR); in me2600_xilinx_download()478 dev_private->plx_regbase = pci_ioremap_bar(pcidev, 0); in me_auto_attach()479 if (!dev_private->plx_regbase) in me_auto_attach()546 if (dev_private->plx_regbase) in me_detach()547 iounmap(dev_private->plx_regbase); in me_detach()
170 unsigned long plx_regbase; member346 outl(PLX9052_INTCSR_LI2POL, info->plx_regbase + PLX9052_INTCSR); in me4000_xilinx_download()349 val = inl(info->plx_regbase + PLX9052_CNTRL); in me4000_xilinx_download()351 outl(val, info->plx_regbase + PLX9052_CNTRL); in me4000_xilinx_download()358 val = inl(info->plx_regbase + PLX9052_INTCSR); in me4000_xilinx_download()365 val = inl(info->plx_regbase + PLX9052_CNTRL); in me4000_xilinx_download()367 outl(val, info->plx_regbase + PLX9052_CNTRL); in me4000_xilinx_download()381 val = inl(info->plx_regbase + PLX9052_CNTRL); in me4000_xilinx_download()390 val = inl(info->plx_regbase + PLX9052_CNTRL); in me4000_xilinx_download()398 val = inl(info->plx_regbase + PLX9052_CNTRL); in me4000_xilinx_download()[all …]