Searched refs:rb_cntl (Results 1 – 4 of 4) sorted by relevance
/linux-4.1.27/drivers/gpu/drm/radeon/ |
D | ni_dma.c | 159 u32 rb_cntl; in cayman_dma_stop() local 166 rb_cntl = RREG32(DMA_RB_CNTL + DMA0_REGISTER_OFFSET); in cayman_dma_stop() 167 rb_cntl &= ~DMA_RB_ENABLE; in cayman_dma_stop() 168 WREG32(DMA_RB_CNTL + DMA0_REGISTER_OFFSET, rb_cntl); in cayman_dma_stop() 171 rb_cntl = RREG32(DMA_RB_CNTL + DMA1_REGISTER_OFFSET); in cayman_dma_stop() 172 rb_cntl &= ~DMA_RB_ENABLE; in cayman_dma_stop() 173 WREG32(DMA_RB_CNTL + DMA1_REGISTER_OFFSET, rb_cntl); in cayman_dma_stop() 190 u32 rb_cntl, dma_cntl, ib_cntl; in cayman_dma_resume() local 211 rb_cntl = rb_bufsz << 1; in cayman_dma_resume() 213 rb_cntl |= DMA_RB_SWAP_ENABLE | DMA_RPTR_WRITEBACK_SWAP_ENABLE; in cayman_dma_resume() [all …]
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D | r600_dma.c | 101 u32 rb_cntl = RREG32(DMA_RB_CNTL); in r600_dma_stop() local 106 rb_cntl &= ~DMA_RB_ENABLE; in r600_dma_stop() 107 WREG32(DMA_RB_CNTL, rb_cntl); in r600_dma_stop() 123 u32 rb_cntl, dma_cntl, ib_cntl; in r600_dma_resume() local 132 rb_cntl = rb_bufsz << 1; in r600_dma_resume() 134 rb_cntl |= DMA_RB_SWAP_ENABLE | DMA_RPTR_WRITEBACK_SWAP_ENABLE; in r600_dma_resume() 136 WREG32(DMA_RB_CNTL, rb_cntl); in r600_dma_resume() 149 rb_cntl |= DMA_RPTR_WRITEBACK_ENABLE; in r600_dma_resume() 170 WREG32(DMA_RB_CNTL, rb_cntl | DMA_RB_ENABLE); in r600_dma_resume()
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D | cik_sdma.c | 252 u32 rb_cntl, reg_offset; in cik_sdma_gfx_stop() local 264 rb_cntl = RREG32(SDMA0_GFX_RB_CNTL + reg_offset); in cik_sdma_gfx_stop() 265 rb_cntl &= ~SDMA_RB_ENABLE; in cik_sdma_gfx_stop() 266 WREG32(SDMA0_GFX_RB_CNTL + reg_offset, rb_cntl); in cik_sdma_gfx_stop() 368 u32 rb_cntl, ib_cntl; in cik_sdma_gfx_resume() local 389 rb_cntl = rb_bufsz << 1; in cik_sdma_gfx_resume() 391 rb_cntl |= SDMA_RB_SWAP_ENABLE | SDMA_RPTR_WRITEBACK_SWAP_ENABLE; in cik_sdma_gfx_resume() 393 WREG32(SDMA0_GFX_RB_CNTL + reg_offset, rb_cntl); in cik_sdma_gfx_resume() 406 rb_cntl |= SDMA_RPTR_WRITEBACK_ENABLE; in cik_sdma_gfx_resume() 415 WREG32(SDMA0_GFX_RB_CNTL + reg_offset, rb_cntl | SDMA_RB_ENABLE); in cik_sdma_gfx_resume()
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D | ni.c | 1670 uint32_t rb_cntl; in cayman_cp_resume() local 1675 rb_cntl = order_base_2(ring->ring_size / 8); in cayman_cp_resume() 1676 rb_cntl |= order_base_2(RADEON_GPU_PAGE_SIZE/8) << 8; in cayman_cp_resume() 1678 rb_cntl |= BUF_SWAP_32BIT; in cayman_cp_resume() 1680 WREG32(cp_rb_cntl[i], rb_cntl); in cayman_cp_resume()
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